Low thermal mass semiconductor wafer boat
View Patent ↗A wafer boat for a semiconductor wafer includes vertical rods, fingers supported by the vertical rods, and plates supported by the fingers. The plate has a support surface for supporting the wafer and a recessed surface spaced from the support surface and spaced from the wafer. A plurality of holes extends from the recessed surface, and the support surface is free of holes to inhibit contamination of the wafer.
1. A wafer boat for use in heat treatment of semiconductor wafers in a furnace, the boat comprising:
vertical rods,
fingers supported by the vertical rods, and
plates supported by the fingers,
at least some of the plates including a support surface having at least one planar plateau for supporting the wafer and a recessed surface spaced below the plateau from the support surface and thereby spaced from the wafer, a plurality of arc-shaped holes extending from the recessed surface, and the support surface being free of holes to inhibit contamination of the wafer, wherein the plurality of arc-shaped holes inhibit slip in the wafer during high temperature processing of the wafer.
2. The wafer boat of claim 1 in combination with a semiconductor wafer.
3. The wafer boat of claim 2 wherein at least some of the plates are C shaped.
4. The wafer boat of claim 1 wherein each plate has a bottom surface and the holes extend from the recessed surface through to the bottom surface.
5. The wafer boat of claim 4 wherein the area of each plate is less than 50% of that of the wafer.
6. The wafer boat of claim 4 wherein the area of each plate is less than 40% of that of the wafer.
7. The wafer boat of claim 6 wherein the support surface includes two planar plateaus separated by the recessed surface, the recessed surface defined by a groove.
8. A wafer boat for use in heat treatment of semiconductor wafers in a furnace, the boat comprising:
vertical rods,
fingers supported by the vertical rods, and
plates supported by the fingers,
at least some of the plates including a support surface having two planar plateaus for supporting the wafer and a recessed surface between the plateaus spaced from the support surface and thereby spaced from the wafer, a plurality of arc-shaped holes extending from the recessed surface, and the support surface being free of holes to inhibit contamination of the wafer, wherein the plurality of arc-shaped holes inhibit slip in the wafer during high temperature processing of the wafer.
9. The wafer boat of claim 8 in combination with a semiconductor wafer.
10. The wafer boat of claim 8 wherein at least some of the plates are C shaped.
11. The wafer boat of claim 8 wherein each plate has a bottom surface and the holes extend from the recessed surface through to the bottom surface.
12. The wafer boat of claim 8 wherein the area of each plate is less than 50% of that of the wafer.
13. The wafer boat of claim 8 wherein the area of each plate is less than 40% of that of the wafer.