IP Library Granted Patent US 7,497,907
Granted Patent B2
US 7,497,907 · App. 10/898,148 · Granted Mar 3, 2009

Partially devitrified crucible

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Quick Facts
Patent No.
US 7,497,907
App. No.
10/898,148
Granted
Mar 3, 2009
Kind
B2
Abstract

A vitreous crucible for holding semiconductor material during a moncrystalline ingot growing process has a sidewall. Part of the sidewall is coated with a devitrification promoter and part of the sidewall is substantially free from devitrification promoter coating. When the crucible is heated as it would be during an ingot growing process, the devitrification promoter induces crystallization of portions of the sidewall, thereby forming enhanced stiffness sidewall portions. Areas that are substantially free from devitrification promoters remain vitreous and are softened by the heat. These become stress accommodating sidewall portions. Flow of the vitreous material in the stress accommodating sidewall portions relieves stresses that would otherwise build up in the sidewall.

Claims (17)

1. A crucible holding melted semiconductor material, the crucible comprising:

a body of vitreous silica having an open top, a bottom and a sidewall extending up from the bottom, the bottom and sidewall defining a cavity holding the semiconductor material in the crucible below a level of the melted semiconductor material, the sidewall having an inner surface, an outer surface, an enhanced stiffness sidewall portion and a stress accommodating sidewall portion at least part of which is positioned below said enhanced stiffness sidewall portion, the enhanced stiffness sidewall portion being at least partially devitrified and the stress accommodating sidewall portion being substantially free of devitrification so that the stress accommodating sidewall portion accommodates stress in the sidewall,

wherein at least one of said inner and outer surfaces of the sidewall includes at least part of both said enhanced stiffness sidewall portion and said stress accommodating sidewall portion, and

wherein the body of the crucible is substantially free of enhanced stiffness sidewall portions below the level of the melted semiconductor material.

2. The crucible of claim 1 wherein the sidewall has a plurality of enhanced stiffness portions including said enhanced stiffness portion, said plurality of enhanced stiffness portions being spaced apart circumferentially about the sidewall.

3. The crucible of claim 2 wherein the sidewall has a plurality of enhanced stiffness portions including said enhanced stiffness portion, at least one of said plurality of enhanced stiffness portions is at least partially on one of the inner and outer surface of the sidewall, and another of said plurality of enhanced stiffness sidewall portions is at least partially on the other of the inner and outer surfaces of the sidewall.

4. The crucible of claim 3 wherein said at least one enhanced stiffness sidewall portion that is at least partially on one of the inner and outer surface of the sidewall and said another enhanced stiffness sidewall portion include parts of the inner and outer surfaces that are in registration with one another.

5. The crucible of claim 2 in combination with a susceptor for supporting the crucible in a high temperature environment, wherein the susceptor has splits and at least one enhanced stiffness sidewall portion is located adjacent to one of the splits.

6. The crucible of claim 2 in combination with a susceptor for supporting the crucible in a high temperature environment, wherein the susceptor has splits and wherein at least one enhanced stiffness sidewall portion is located adjacent to a midway point between the splits on the circumference of the body.

7. The crucible of claim 1 wherein said enhanced stiffness sidewall portion is located adjacent to the open top of the body.

8. A crucible holding melted semiconductor material, the crucible comprising: a body of vitreous silica having an open top, a bottom opposite the top and a sidewall extending up from the bottom to the top, the bottom and sidewall defining a cavity holding the melted semiconductor material, the melted semiconductor material having a level on the sidewall, the sidewall having an inner surface and an outer surface; and a devitrification promoter coating on at least a portion of one of the inner and outer surfaces of the sidewall; wherein a lower margin of the sidewall adjacent the bottom and beneath the level of the melted semiconductor material is substantially free of devitrification promoter coating on the inner surface and the outer surface to accommodate stress in the sidewall when heated.

9. The crucible of claim 8 wherein part of the devitrification promoter coating is on the inner surface of the sidewall and part of the devitrification promoter coating is on the outer surface of the sidewall.

10. The crucible of claim 9 wherein part of the devitrification promoter coating on the inner surface and part of the devitrification promoter coating on the outer surface are in registration with each other.

11. The crucible of claim 8 wherein: the cavity holds the semiconductor material in the crucible below a preselected maximum melt level for the crucible; and the body of the crucible is substantially free of enhanced stiffness sidewall portions below a plane that is at least 1 mm above the preselected maximum melt level for the crucible.

12. The crucible of claim 11 wherein the plane below which the body is substantially free of enhanced stiffness sidewall portions is at least 10 mm above the preselected maximum melt level for the crucible.

13. The crucible of claim 11 wherein the plane below which the body is substantially free of enhanced stiffness sidewall portions is at least 50 mm above the preselected maximum melt level for the crucible.

14. The crucible of claim 8 wherein at least a portion of the devitrification promoter coating occupies a band extending circumferentially around the body adjacent the top on the inner surface of the sidewall.

Assignments (9)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 7, 2018
From: SUNEDISON SEMICONDUCTOR LIMITED; MEMC JAPAN LIMITED; MEMC ELECTRONIC MATERIALS S.P.A.
To: GLOBALWAFERS CO., LTD.
Reel/Frame 046327/0001 →
NOTICE OF LICENSE AGREEMENT Recorded Jun 6, 2014
From: SUNEDISON SEMICONDUCTOR LIMITED
To: SUNEDISON SEMICONDUCTOR TECHNOLOGY PTE. LTD.
Reel/Frame 033099/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2014
From: MEMC ELECTRONIC MATERIALS, INC.
To: SUNEDISON SEMICONDUCTOR LIMITED (UEN201334164H)
Reel/Frame 033023/0430 →
RELEASE OF SECURITY INTEREST Recorded Mar 3, 2014
From: DEUTSCHE BANK AG NEW YORK BRANCH
To: NVT, LLC; SUN EDISON LLC; SOLAICX; SUNEDISON, INC.
Reel/Frame 032382/0724 →
SECURITY AGREEMENT Recorded Jan 30, 2014
From: SUNEDISON, INC.; SOLAICX; SUN EDISON, LLC; NVT, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 032177/0359 →
RELEASE OF SECURITY INTEREST Recorded Dec 26, 2013
From: GOLDMAN SACHS BANK USA
To: NVT, LLC; SUN EDISON LLC; SOLAICX; SUNEDISON, INC. (F/K/A MEMC ELECTRONIC MATERIALS, INC.)
Reel/Frame 031870/0092 →
RELEASE OF SECURITY INTEREST Recorded Dec 26, 2013
From: BANK OF AMERICA, N.A.
To: ENFLEX CORPORATION; SUN EDISON LLC; SOLAICX; SUNEDISON, INC. (F/K/A MEMC ELECTRONIC MATERIALS, INC.)
Reel/Frame 031870/0031 →
SECURITY AGREEMENT Recorded Oct 1, 2012
From: NVT, LLC; SUN EDISON LLC; SOLAICX, INC.; MEMC ELECTRONIC MATERIALS, INC.
To: GOLDMAN SACHS BANK USA
Reel/Frame 029057/0810 →
SECURITY AGREEMENT Recorded Apr 1, 2011
From: MEMC ELECTRONIC MATERIALS, INC.; SUNEDISON LLC; SOLAICX
To: BANK OF AMERICA, N.A.
Reel/Frame 026064/0720 →