IP Library Granted Patent US 6,846,539
Granted Patent B2
US 6,846,539 · App. 10/054,629 · Granted Jan 25, 2005

Low defect density silicon having a vacancy-dominated core substantially free of oxidation induced stacking faults

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Quick Facts
Patent No.
US 6,846,539
App. No.
10/054,629
Granted
Jan 25, 2005
Kind
B2
Abstract

The present invention relates to a process for preparing a single crystal silicon ingot, as well as to the ingot or wafer resulting therefrom. The process comprises controlling (i) a growth velocity, v, (ii) an average axial temperature gradient, G 0 , and (iii) a cooling rate of the crystal from solidification to about 750° C., in order to cause the formation of a segment having a first axially symmetric region extending radially inward from the lateral surface of the ingot wherein silicon self-interstitials are the predominant intrinsic point defect, and a second axially symmetric region extending radially inward from the first and toward the central axis of the ingot. The process is characterized in that v, G 0 and the cooling rate are controlled to prevent the formation of agglomerated intrinsic point defects in the first region, while the cooling rate is further controlled to limit the formation of oxidation induced stacking faults in a wafer derived from this segment, upon subjecting the wafer to an oxidation treatment otherwise suitable for the formation of such faults.

Claims (32)

1. A single crystal silicon wafer having a central axis, a front side and a back side which are generally perpendicular to the axis, a circumferential edge, and a radius extending from the central axis to the circumferential edge of the wafer, the wafer comprising:

an interstitial-dominated, axially symmetric region extending radially inward from the circumferential edge which is substantially free of A type agglomerated interstitial defects; and,

a vacancy-dominated, axially symmetric region extending radially inward from the interstitial-dominated region and containing agglomerated vacancy defects, wherein the concentration of agglomerated vacancy defects is greater than 10 3 defects/cm 3 , and further wherein, upon being subjected to an oxidation treatment, an oxidation induced stacking fault concentration is less than about 50/cm 2 .

2. The wafer of claim 1 wherein the interstitial-dominated, axially symmetric region is also substantially free of B type agglomerated defects.

3. The wafer of claim 1 wherein the wafer has a diameter of at least 150 mm.

4. The wafer of claim 1 wherein the interstitial-dominated, axially symmetric region has a radial width of about 40% of the length of the radius of the ingot.

5. The wafer of claim 1 wherein the interstitial-dominated, axially symmetric region has a radial width of about 60% of the length of the radius of the ingot.

6. The wafer of claim 1 wherein the average oxygen content of the wafer is within the range of about 11 to about 14.5 PPMA.

7. The wafer of claim 1 wherein the average oxygen content of the wafer is within the range of about 14.5 to about 18 PPMA.

8. The wafer of claim 1 wherein the oxidation induced stacking fault concentration of the wafer is less than about 40/cm 2 .

9. The wafer of claim 1 wherein the oxidation induced stacking fault concentration of the wafer is less than about 20/cm 2 .

10. The wafer of claim 1 wherein the oxidation induced stacking fault concentration of the wafer is less than about 10/cm 2 .

11. The wafer of claim 1 wherein the number of light point defects equal to or greater than about 0.12 microns in size on the wafer surface is less than about 25.

12. The wafer of claim 1 wherein the number of light point defects equal to or greater than about 0.12 microns in size on the wafer surface is less than about 10.

13. The wafer of claim 1 wherein the interstitial-dominated, axially symmetric region has a radial width of about 20% of the length of the radius of the ingot.

14. The wafer of claim 1 wherein the interstitial-dominated, axially symmetric region has a radial width of about 80% of the length of the radius of the ingot.

15. The wafer of claim 1 wherein the wafer has a diameter of at least 200 mm.

16. The wafer of claim 15 wherein the interstitial-dominated, axially symmetric region is also substantially free of B type agglomerated defects.

17. The wafer of claim 15 wherein the interstitial-dominated, axially symmetric region has a radial width of about 40% of the length of the radius of the ingot.

18. The wafer of claim 15 wherein the interstitial-dominated, axially symmetric region has a radial width of about 60% of the length of the radius of the ingot.

19. The wafer of claim 15 the average oxygen content of the wafer is within the range of about 11 to about 14.5 PPMA.

20. The wafer of claim 15 wherein the average oxygen content of the wafer is within the range of about 14.5 to about 18 PPMA.

21. The wafer of claim 15 wherein the oxidation induced stacking fault concentration of the wafer is less than about 20/cm 2 .

22. The wafer of claim 15 wherein the number of light point defects equal to or greater than about 0.12 microns in size on the wafer surface is less than about 25.

23. The wafer of claim 1 wherein the wafer has a diameter of at least 300 mm.

24. The wafer of claim 23 wherein the interstitial-dominated, axially symmetric region is also substantially free of B type agglomerated defects.

25. The wafer of claim 23 wherein the interstitial-dominated, axially symmetric region has a radial width of about 40% of the length of the radius of the ingot.

26. The wafer of claim 23 wherein the interstitial-dominated, axially symmetric region has a radial width of about 60% of the length of the radius of the ingot.

27. The wafer of claim 23 wherein the average oxygen content of the wafer is within the range of about 11 to about 14.5 PPMA.

28. The wafer of claim 23 wherein the average oxygen content of the wafer is within the range of about 14.5 to about 18 PPMA.

29. The wafer of claim 23 wherein the oxidation induced stacking fault concentration of the wafer is less than about 20/cm 2 .

30. The wafer of claim 23 wherein the number of light point defects equal to or greater than about 0.12 microns in size on the wafer surface is less than about 25.

Assignments (12)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 7, 2018
From: SUNEDISON SEMICONDUCTOR LIMITED; MEMC JAPAN LIMITED; MEMC ELECTRONIC MATERIALS S.P.A.
To: GLOBALWAFERS CO., LTD.
Reel/Frame 046327/0001 →
NOTICE OF LICENSE AGREEMENT Recorded Jun 6, 2014
From: SUNEDISON SEMICONDUCTOR LIMITED
To: SUNEDISON SEMICONDUCTOR TECHNOLOGY PTE. LTD.
Reel/Frame 033099/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2014
From: MEMC ELECTRONIC MATERIALS, INC.
To: SUNEDISON SEMICONDUCTOR LIMITED (UEN201334164H)
Reel/Frame 033023/0430 →
RELEASE OF SECURITY INTEREST TO REEL/FRAME: 013964/0378 Recorded Mar 17, 2014
From: CITICORP USA, INC.
To: MEMC ELECTRONIC MATERIALS, INC. (NOW KNOWN AS SUNEDISON, INC.); MEMC PASADENA, INC.; PLASMASIL, L.L.C.; SIBOND, L.L.C.; MEMC SOUTHWEST INC.; MEMC INTERNATIONAL, INC. (NOW KNOWN AS SUNEDISON INTERNATIONAL, INC.)
Reel/Frame 032458/0958 →
RELEASE OF SECURITY INTEREST Recorded Mar 3, 2014
From: DEUTSCHE BANK AG NEW YORK BRANCH
To: NVT, LLC; SUN EDISON LLC; SOLAICX; SUNEDISON, INC.
Reel/Frame 032382/0724 →
SECURITY AGREEMENT Recorded Jan 30, 2014
From: SUNEDISON, INC.; SOLAICX; SUN EDISON, LLC; NVT, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 032177/0359 →
RELEASE OF SECURITY INTEREST Recorded Dec 26, 2013
From: BANK OF AMERICA, N.A.
To: ENFLEX CORPORATION; SUN EDISON LLC; SOLAICX; SUNEDISON, INC. (F/K/A MEMC ELECTRONIC MATERIALS, INC.)
Reel/Frame 031870/0031 →
RELEASE OF SECURITY INTEREST Recorded Dec 26, 2013
From: GOLDMAN SACHS BANK USA
To: NVT, LLC; SUN EDISON LLC; SOLAICX; SUNEDISON, INC. (F/K/A MEMC ELECTRONIC MATERIALS, INC.)
Reel/Frame 031870/0092 →
SECURITY AGREEMENT Recorded Oct 1, 2012
From: NVT, LLC; SUN EDISON LLC; SOLAICX, INC.; MEMC ELECTRONIC MATERIALS, INC.
To: GOLDMAN SACHS BANK USA
Reel/Frame 029057/0810 →
SECURITY AGREEMENT Recorded Apr 1, 2011
From: MEMC ELECTRONIC MATERIALS, INC.; SUNEDISON LLC; SOLAICX
To: BANK OF AMERICA, N.A.
Reel/Frame 026064/0720 →
SECURITY AGREEMENT Recorded Mar 19, 2003
From: MEMC ELECTRONIC MATERIALS, INC.; MEMC PASADENA, INC.; PLASMASIL, L.L.C.; SIBOND, L.L.C.; MEMC SOUTHWEST INC.; MEMC INTERNATIONAL, INC.; MEMC HOLDINGS CORPORATION
To: CITICORP USA, INC.
Reel/Frame 013964/0378 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 8, 2002
From: KIM, CHANG BUM; KIMBEL, STEVEN L.; LIBBERT, JEFFREY L.; BANAN, MOHSEN
To: MEMC ELECTRONIC MATERIALS, INC.
Reel/Frame 012789/0747 →