Stacked pixels for high resolution CMOS image sensors with BCMD charge detectors
View Patent ↗The invention describes in detail a solid-state CMOS image sensor, specifically a CMOS image sensor pixel that has stacked photo-sites, high sensitivity, and low dark current. The pixels have incorporated therein special potential barriers under the standard pinned photodiode region that diverts the photo-generated electrons from a deep region within the silicon bulk to separate storage structures located at the surface of the silicon substrate next to the pinned photodiode. The storage structures are p channel BCMD transistors that are biased to a low dark current generation mode during a charge integration period. The signal readout from the BCMD is nondestructive, therefore, without kTC noise generation. Thus a single pixel is capable of detecting several color-coded signals while using fewer or without using any light absorbing color filters on top of the pixel. The image sensors constructed with the stacked photo-sites with BCMD readout have higher pixel densities, higher resolution, higher sensitivity, very low dark current, and no color aliasing if at least three depth encoded signals are read from a single photodiode. The pixels having stacked photo-sites with BCMD readout are particularly suitable for a CMOS image sensor that is illuminated from the back side.
1. An image sensor including an array of pixels, each pixel comprising:
a plurality of Bulk Charge Modulated Device (BCMD) devices near the surface of a substrate;
a plurality of vertically stacked photo-sites formed in the substrate for collection of photo-generated carriers, wherein the photo-sites are separated by a plurality of potential barriers;
said pixel further being configured such that charge generated in each of said plurality of photo-sites, in accordance with the wavelength of impinging light, will be directed to flow to a corresponding one of said plurality of BCMD devices for storage and detection of the generated charge;
said BCMD devices further being coupled to column sense lines through row addressing transistors for reading the charge stored in each of the plurality of BCMD devices; and
reset transistors coupled to said plurality of BCMD devices for removing charge from said plurality of BCMD devices after charge readout.
2. The image sensor array of claim 1 wherein each pixel includes three separate photo-sites that are configured such that a first BCMD device collects electrons generated by blue light, a second BCMD device collects charge generated mostly by green light, and a third BCMD device collects charge generated by red light.
3. The image sensor array of claim 1 wherein said plurality of BCMD devices are p channel devices.
4. The image sensor array of claim 1 wherein the pixels having stacked photo-sites are configured such that the array may be illuminated from the back side of the substrate.
5. The image sensor array of claim 1 which further includes micro-lenses placed on top or bottom of the pixels depending on the pixel illumination direction.
6. The image sensor array of claim 5 which further includes color filters placed on top or bottom of the pixels depending on the pixel illumination direction.
7. The image sensor defined in claim 1 wherein the plurality of vertically stacked photo-sites in each pixel comprises:
a first photodiode comprising PNP layers and disposed near the surface of the substrate;
a second photodiode beneath said first photodiode consisting of NPN layers; and
a third photodiode beneath said second photodiode consisting of PNP layers.