IP Library Granted Patent US 8,546,951
Granted Patent B2
US 8,546,951 · App. 13/157,207 · Granted Oct 1, 2013

3D integration microelectronic assembly for integrated circuit devices

Inventor: Vage Oganesian (Sunnyvale, CA)
Assignee: Optiz, Inc.
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Quick Facts
Patent No.
US 8,546,951
App. No.
13/157,207
Granted
Oct 1, 2013
Kind
B2
Abstract

A 3D interposer (and method of making same) that includes a crystalline substrate handler having opposing first and second surfaces, with a cavity formed into the first surface. A layer of insulation material is formed on the surface of the handler that defines the cavity. The cavity is filled with a compliant dielectric material. A plurality of electrical interconnects is formed through the interposer. Each electrical interconnect includes a first hole formed through the crystalline substrate handler extending from the second surface to the cavity, a second hole formed through the compliant dielectric material so as to extend from and be aligned with the first hole, a layer of insulation material formed along a sidewall of the first hole, and conductive material extending through the first and second holes.

Claims (24)

1. An interposer, comprising:

a crystalline substrate handler having opposing first and second surfaces, wherein a cavity is formed into the first surface;

a layer of insulation material disposed on a surface of the handler that defines the cavity;

a compliant dielectric material disposed in the cavity; and

a plurality of electrical interconnects each comprising:

a first hole formed through the crystalline substrate handler extending from the second surface to the cavity,

a second hole formed through the compliant dielectric material so as to extend from and be aligned with the first hole,

a layer of insulation material formed along a sidewall of the first hole, and

conductive material extending through the first and second holes.

2. The interposer of claim 1 , wherein the compliant dielectric material includes a polymer.

3. The interposer of claim 1 , wherein for each of the plurality of electrical interconnects, the first hole is tapered such that the first hole has a smaller cross-sectional dimension at the cavity than at the second surface.

4. The interposer of claim 1 , wherein for each of the plurality of electrical interconnects, the sidewall of the first hole extends in a direction between 5° and 45° relative to a direction that is perpendicular to the first and second surfaces.

5. The interposer of claim 1 , wherein the conductive material comprises a layer of metal extending along sidewalls of the first and second holes.

6. The interposer of claim 1 , wherein each of the plurality of electrical interconnects further comprises:

a first metal contact disposed over the first hole, insulated from the second surface, and electrically coupled to the conductive material; and

a second metal contact disposed over the dielectric material and the second hole, and electrically coupled to the conductive material,

wherein the first metal contact is electrically coupled to the second metal contact via the conductive material extending through the first and second holes.

7. The interposer of claim 6 , further comprising:

a first plurality of rounded interconnects each electrically coupled to one of the first metal contacts; and

a second plurality of rounded interconnects each electrically coupled to one of the second metal contacts.

8. The interposer of claim 6 , further comprising:

one or more layers of insulation materials disposed over the first surface and over the compliant dielectric material wherein the one or more layers of insulation materials encapsulates the compliant dielectric material in the cavity, and wherein the second metal contacts extend through the one or more layers of insulation materials.

9. The interposer of claim 6 , further comprising:

an IC device including a plurality of bond pads, wherein the IC device is mounted over the second surface such that the plurality of bond pads are electrically coupled to the first plurality of rounded interconnects.

Assignments (2)
CHANGE OF NAME Recorded Jun 19, 2012
From: CHINA WLCSP US, INC.
To: OPTIZ, INC.
Reel/Frame 028406/0571 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 2, 2011
From: OGANESIAN, VAGE
To: CHINA WLCSP US, INC.
Reel/Frame 026853/0040 →
Continuity (1)
Related Publication 20120313255A1 · Dec 13, 2012