Test circuit for use in a semiconductor apparatus
A test circuit that senses a misaligned probe during a test includes a first power control section that senses voltage levels of a plurality of sensing lines and controls power supplied to a lower circuit section provided below a part of a pad group, and a second power control section that selectively provides an internal voltage in response to a sensing result of the first power control section.
1. A semiconductor apparatus comprising:
first and second pad groups, wherein each pad in the pad groups includes an edge region surrounding a region to be probed;
a plurality of sensing lines provided below a part of the edge region of at least one of the pads in the first pad group;
a circuit section under at least one of the pads of the first or second pad groups; and
a test circuit configured to
sense a short circuit between the at least one of the pads in the first pad group and the plurality of sensing lines thereby sensing abnormal pressure of a probe,
control the operation of the circuit section, and
monitor the circuit section.
2. The semiconductor apparatus of claim 1 , wherein
the circuit section is provided below the first pad group, and
the second pad group is a power pad group.
3. The semiconductor apparatus of claim 1 , wherein the test circuit comprises:
a first power control section configured to
detect and compare voltage levels of the plurality of sensing lines so as to sense abnormal pressure and abnormal position of the probe, and
control power supplied to the circuit section provided below the first pad group; and
a power control block configured to selectively provide an internal voltage serving as a monitoring signal to the second pad group so as to monitor a sensing result of the first power control section.
4. The semiconductor apparatus of claim 1 , wherein
each pad in the first and second pad groups includes a top metal layer,
the circuit section includes an under metal layer, and
the plurality of sensing lines includes a metal layer different from the metal layers of the pad and the circuit section.
5. The semiconductor apparatus of claim 1 , wherein the circuit section includes at least one of an ESD (Electro-Static Discharge) circuit section and a semiconductor device.