IP Library Granted Patent US 8,199,586
Granted Patent B2
US 8,199,586 · App. 13/168,855 · Granted Jun 12, 2012

Programming and selectively erasing non-volatile storage

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Quick Facts
Patent No.
US 8,199,586
App. No.
13/168,855
Granted
Jun 12, 2012
Kind
B2
Abstract

A non-volatile storage system performs programming for a plurality of non-volatile storage elements and selectively performs re-erasing of at least a subset of the non-volatile storage elements that were supposed to remain erased, without intentionally erasing programmed data.

Claims (89)

1. A method for operating non-volatile storage, comprising:

erasing non-volatile storage elements;

performing programming for said non-volatile storage elements; and

selectively performing re-erasing of a first subset of non-volatile storage elements that were supposed to remain erased without intentionally erasing programmed data by performing one or more erase operations for the first subset of non-volatile storage elements that were supposed to remain erased comprising

boosting a first set of channel regions to a first voltage range for the first subset of non-volatile elements that were supposed to remain erased without boosting a second set of channel regions to said first voltage range for a second subset of non-volatile elements that were supposed to be programmed, said first set of channel regions and said second set of channel regions are part of a common substrate region,

applying a boosting enabling voltage to said first subset of non-volatile storage elements,

applying a boosting disabling voltage to said second subset of non-volatile storage elements,

charging said common substrate region,

applying a voltage signal to an unselected common control line for coupling said first subset and said second subset of non-volatile storage elements to said unselected common control line,

applying a boosting signal beyond said voltage signal to said unselected common control line to boost said first set of channel regions, and

applying a common enabling voltage to said first subset of non-volatile storage elements and said second subset of non-volatile storage elements in order to lower threshold voltages of said first subset of non-volatile storage elements without intentionally lowering threshold voltages of said second subset of non-volatile storage elements.

2. A method according to claim 1 , wherein said selectively performing re-erasing of a first subset of non-volatile storage elements that were supposed to remain erased further comprises:

identifying which non-volatile storage elements that should remain erased as the first subset of non-volatile storage elements;

testing whether said non-volatile storage elements that were supposed to remain erased appear to have been altered past a threshold; and

performing one or more erase operations for the first subset of non-volatile storage elements that should remain erased and appear to have been altered past said threshold.

3. A method according to claim 1 , wherein:

said non-volatile storage elements are NAND flash memory devices and said common control line is a common word line.

4. A method according to claim 1 , wherein:

said performing programming for said non-volatile storage elements comprises receiving data to be stored by said non-volatile storage elements, said data indicates that a first subset of said non-volatile storage elements are to remain erased and a second subset of said non-volatile storage elements are to be programmed, said performing programming changes threshold voltages for said second subset of said non-volatile storage elements and attempts to not change threshold voltages for said first subset of said non-volatile storage elements.

5. A method according to claim 1 , wherein:

said first subset of non-volatile storage elements are flash memory devices that are connected to a common word line and are each part of a different NAND string.

6. A method according to claim 1 , wherein said performing programming for said non-volatile storage elements and selectively performing re-erasing of at least said subset of non-volatile storage elements comprises:

performing a first pass of a first multi-pass programming process for non-volatile storage elements connected to a first control line;

performing a first pass of a second multi-pass programming process for non-volatile storage elements connected to a second control line;

after performing said first pass of said second multi-pass programming process, selectively performing re-erasing of at least a subset of said non-volatile storage elements connected to said first control line that were supposed to remain erased;

selectively performing re-erasing of at least a subset of said non-volatile storage elements connected to said second control line that were supposed to remain erased;

after selectively performing re-erasing of at least a subset of said non-volatile storage elements connected to said first control line, performing a second pass of said first multi-pass programming process for at least some of said non-volatile storage elements connected to said first control line; and

performing a second pass of said second multi-pass programming process for at least some of said non-volatile storage elements connected to said second control line.

7. A method according to claim 6 , wherein:

said first pass of said first multi-pass programming process is a coarse stage of said first multi-pass programming; and

said second pass of said first multi-pass programming process is a fine stage of said first multi-pass programming.

8. A method according to claim 6 , wherein:

said first pass of said first multi-pass programming process causes said non-volatile storage elements connected to said first control line to be in a first number of data states; and

said second pass of said first multi-pass programming process causes said non-volatile storage elements connected to said first control line to be in a second number of data states, said second number of data states is greater than said first number of data states.

9. A method according to claim 6 , further comprising:

performing a first pass of a third multi-pass programming process on non-volatile storage elements connected to a third control line;

selectively performing re-erasing of at least a subset of said non-volatile storage elements connected to said third control line that were supposed to remain erased; and

performing a second pass of said third multi-pass programming process for said non-volatile storage elements connected to said third control line;

wherein said selectively performing re-erasing of at least a subset of said non-volatile storage elements connected to said second control line is performed after performing said first pass of said third multi-pass programming process.

10. A method according to claim 6 , wherein:

said first pass of said first multi-pass programming process and said second pass of said first multi-pass programming process program a common set of data.

11. A method according to claim 1 , wherein said performing programming for said non-volatile storage elements and selectively performing re-erasing of at least a subset of non-volatile storage elements comprises:

performing a first pass of a first multi-pass programming process for said non-volatile storage elements connected to a first control line;

performing a first pass of a second multi-pass programming process for said non-volatile storage elements connected to a second control line after performing said first pass of said first multi-pass programming process;

after performing said first pass of said second multi-pass programming process, selectively performing re-erasing of at least a subset of said non-volatile storage elements connected to said first control line that were supposed to remain erased;

after selectively performing re-erasing of at least a subset of said non-volatile storage elements connected to said first control line, selectively performing re-erasing of at least a subset of said non-volatile storage elements connected to said second control line that were supposed to remain erased;

after selectively performing re-erasing of at least a subset of said non-volatile storage elements connected to said second control line, performing a second pass of said first multi-pass programming process for at least some of said non-volatile storage elements connected to said first control line; and

after performing said second pass of said first multi-pass programming process, performing a second pass of said second multi-pass programming process for at least some of said non-volatile storage elements connected to said second control line.

12. A method according to claim 1 , wherein:

said non-volatile storage elements are connected to a common word line;

said performing programming and said selectively performing re-erasing are performed on a word line basis; and

said erasing is performed on a block basis.

13. A method for operating non-volatile storage, comprising:

erasing a set of non-volatile storage elements, said non-volatile storage elements are flash memory devices connected to a common word line;

receiving data to be stored by said set of non-volatile storage elements, said data indicates that some of said non-volatile storage elements are to be programmed and some of said non-volatile storage elements are to remain erased;

programming said data into said set of non-volatile storage elements; and

selectively performing re-erasing of at least a first subset of non-volatile storage elements that were supposed to remain erased without intentionally erasing any non-volatile storage elements in a second subset storing properly programmed data by

applying non-negative boosting signals to unselected word lines for said set of non-volatile storage elements;

applying a boosting enabling voltage to bit lines for said first subset of non-volatile storage elements;

applying a boosting disabling voltage to bit lines for said second subset of non-volatile storage elements; and

applying a non-negative voltage to said common word line.

14. A method according to claim 13 , wherein:

said set of non-volatile storage elements include floating gates;

said programming said data into said set of non-volatile storage elements includes adding charge to floating gates indicated by said data to change state and not adding charge to floating gates indicated by said data to not change state.

15. A method according to claim 13 , wherein:

said first subset of non-volatile storage elements are each part of different NAND strings.

16. A method according to claim 13 , wherein programming said data into said set of non-volatile storage elements and selectively performing re-erasing comprises:

performing a first pass of a first multi-pass programming process for non-volatile storage elements connected to a first control line;

performing a first pass of a second multi-pass programming process for non-volatile storage elements connected to a second control line;

after performing said first pass of said second multi-pass programming process, selectively performing re-erasing of at least a first subset of said non-volatile storage elements connected to said first control line that were supposed to remain erased;

selectively performing re-erasing of at least a third subset of said non-volatile storage elements connected to said second control line that were supposed to remain erased;

after selectively performing re-erasing of at least said first subset of said non-volatile storage elements connected to said first control line, performing a second pass of said first multi-pass programming process for non-volatile storage elements connected to said first control line; and

performing a second pass of said second multi-pass programming process for non-volatile storage elements connected to said second control line.

17. A method according to claim 16 , wherein:

said first pass of said first multi-pass programming process is a coarse stage of said first multi-pass programming; and

said second pass of said first multi-pass programming process is a fine stage of said first multi-pass programming.

18. A method according to claim 16 , wherein:

said first pass of said first multi-pass programming process causes said non-volatile storage elements connected to said first control line to be in a first number of data states; and

said second pass of said first multi-pass programming process causes said non-volatile storage elements connected to said first control line to be in a second number of data states, said second number of data states is greater than said first number of data states.

19. A method for operating non-volatile storage, comprising:

erasing non-volatile storage elements;

performing programming for said non-volatile storage elements; and

selectively performing re-erasing of a subset of groups of non-volatile storage elements that were supposed to remain erased and which are connected to a common first set of control lines without intentionally erasing programmed data, each group includes multiple non-volatile storage elements in series and sharing a common channel area, by performing one or more erase operations for the subset of groups of non-volatile storage elements that were supposed to remain erased comprising

applying a boosting enabling voltage to a second set of control lines only for said subset of groups,

applying a boosting disabling voltage to a third set of control lines for groups of non-volatile storage elements not in said subset, and charging a common substrate for said groups, whether in or not in said subset, to a non-negative voltage, and

erasing one or more non-volatile storage elements in each group of said subset without intentionally erasing non-volatile storage elements in groups not in said subset by applying the non-negative voltage to said common first set of control lines.

20. The method according to claim 19 , wherein:

said groups of non-volatile storage elements are NAND strings; and

said common first set of control lines are word lines.

Assignments (6)
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2024
From: SANDISK TECHNOLOGIES LLC
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 069796/0423 →
CHANGE OF NAME Recorded May 25, 2016
From: SANDISK TECHNOLOGIES INC
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 038807/0850 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2011
From: SANDISK CORPORATION
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 026907/0431 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 27, 2011
From: LUTZE, JEFFREY W.; LI, YAN
To: SANDISK CORPORATION
Reel/Frame 026508/0271 →