Lead frame for semiconductor device
View Patent ↗A lead frame for a semiconductor device has a die pad with a first major surface for receiving an semiconductor die and a connection bar that encircles the die pad. First lead fingers that project from the connection bar towards the die pad have proximal ends close to the die pad and distal ends connected to the connection bar. The proximal ends of the first lead fingers lie in a first plane. Second lead fingers that project from the connection bar towards the die pad have proximal ends close to the die pad and distal ends connected to the connection bar. The proximal ends of the second lead fingers lie in a second plane that is parallel and spaced from the first plane. An isolation frame is disposed between the proximal ends of the first and second lead fingers. The isolation frame separates but supports the proximal ends of the first and second lead fingers.
1. A lead frame for a semiconductor device, comprising:
a die pad having a first major surface for receiving an integrated circuit die;
a connection bar that encircles the die pad;
a first plurality of lead fingers that project from the connection bar towards the die pad, wherein the first plurality of lead fingers have proximal ends close to the die pad and distal ends connected to the connection bar, and wherein the proximal ends of the first plurality of lead fingers lie in a first plane;
a second plurality of lead fingers that project from the connection bar towards the die pad, wherein the second plurality of lead fingers have proximal ends close to the die pad and distal ends connected to the connection bar, and wherein the proximal ends of the second plurality of lead fingers lie in a second plane that is parallel and spaced from the first plane; and
an isolation frame that is spaced from and encircles the die pad, wherein the isolation frame lies in the space between the first and second planes and separates the proximal ends of the first plurality of lead fingers from the proximal ends of the second plurality of lead fingers,
wherein the isolation frame includes a first plurality of grooves within which the proximal ends of the first plurality of lead fingers are seated.
2. The lead frame of claim 1 , wherein the isolation frame is formed of a rigid material that electrically isolates the first and second pluralities of lead fingers from each other.
3. The lead frame of claim 2 , wherein the isolation frame is formed of polytetrafluoroethylene.
4. The lead frame of claim 1 , wherein the first and second pluralities of lead fingers are interleaved.
5. The lead frame of claim 1 , wherein the isolation frame includes a second plurality of grooves within which the proximal ends of the second plurality of lead fingers are seated.
6. The lead frame of claim 5 , wherein the first and second pluralities of grooves are formed on opposing sides of the isolation frame.
7. The lead frame of claim 1 , wherein the die pad, the first and second pluralities of lead fingers and the connection bar are formed from a conductive metal sheet.
8. The lead frame of claim 1 , wherein the die pad lies in the first plane.
9. A method of packaging a semiconductor die, comprising:
providing a sheet of conductive metal;
forming a die pad in the conductive sheet;
forming a plurality of lead fingers in the conductive sheet, wherein the plurality of lead fingers extend from a connection bar that encircles the die pad, toward the die pad, and the plurality of lead fingers have a distal end connected to the connection bar and a proximal end near the die pad;
separating the plurality of lead fingers into first and second sets of lead fingers, wherein the proximal ends of the first set of lead fingers lie in a first plane and the proximal ends of the second set of lead fingers lie in a second plane that is parallel with and spaced from the first plane;
installing an isolation frame in the space between the first and second sets of lead fingers, wherein the isolation frame encircles and is spaced from the die pad and isolates the proximal ends of the first and second sets of lead fingers from each other, and wherein the isolation frame includes a first plurality of grooves within which the proximal ends of the first plurality of lead fingers are seated;
attaching a semiconductor die to the die pad;
electrically coupling contact pads on the semiconductor die with the proximal ends of respective ones of the plurality of lead fingers;
encapsulating at least the die, the die pad and the proximal ends of the plurality of lead fingers with a mold compound; and
removing the connection bar, wherein the distal ends of the plurality of lead fingers project outwardly from the mold compound.
10. The method of packaging a semiconductor die of claim 9 , wherein the die pad is formed by stamping.
11. The method of packaging a semiconductor die of claim 9 , wherein the isolation frame comprises polytetrafluoroethylene.
12. The method of packaging a semiconductor die of claim 9 , wherein the first and second pluralities of lead fingers are interleaved.
13. The method of packaging a semiconductor die of claim 9 , wherein the isolation frame includes a second plurality of grooves within which the proximal ends of the second plurality of lead fingers are seated.
14. The method of packaging a semiconductor die of claim 13 , wherein the first and second pluralities of grooves are formed on opposing sides of the isolation frame.
15. The method of packaging a semiconductor die of claim 9 , wherein the isolation frame is formed during the encapsulation step using a toothed mold clamp.
16. The method of packaging a semiconductor die of claim 9 , wherein the electrically coupling step includes performing a wire bonding process.
17. The method of packaging a semiconductor die of claim 9 , further comprising bending the plurality of lead fingers proximate a central area so that the distal ends of the plurality of lead fingers lie in a third plane that is parallel to and spaced from the first and second planes.
18. A semiconductor device, comprising:
a die pad for receiving an integrated circuit die;
a first plurality of lead fingers that are spaced from and project outwardly from the die pad, wherein the lead fingers have proximal ends close to the die pad and distal ends farther from the die pad, and wherein the proximal ends of the first plurality of lead fingers lie in a first plane;
a second plurality of lead fingers that are spaced from and project outwardly from the die pad, wherein the second plurality of lead fingers have proximal ends close to the die pad and distal ends farther from the die pad, and wherein the proximal ends of the second plurality of lead fingers lie in a second plane that is spaced from and parallel with the first plane;
an isolation frame that is spaced from and encircles the die pad, and is disposed in a space between the proximal ends of the first and second pluralities of lead fingers, wherein the isolation frame isolates the proximal ends of the first and second pluralities of lead fingers from each other, and wherein wherein the isolation frame includes a first plurality of grooves within which the proximal ends of the first plurality of lead fingers are seated and a second plurality of grooves within which the proximal ends of the second plurality of lead fingers are seated;
an semiconductor die attached to a surface of the die pad, wherein bonding pads on the semiconductor die are electrically connected to respective ones of the proximal ends of the first and second pluralities of lead fingers with bond wires; and
an encapsulation material that surrounds at least the die pad, the semiconductor die, the isolation frame, and the proximal ends of the first and second pluralities of lead fingers, wherein the distal ends of the first and second pluralities of lead fingers project outwardly from the encapsulation material and allow for external electrical connection with the semiconductor die.