Granted Patent B2

US 9,034,697 · App. 13/182,710 · Granted May 19, 2015

Abstract

Claims (23)

1. A method for fabricating a semiconductor package, the method comprising:

providing a supply of lead elements;

mounting a plurality of the lead elements on a lead frame until a predetermined number of lead elements are placed on the lead frame;

connecting other components on the lead frame to the lead elements;

providing a supply of other components that is accessible by a component placement system; and

operating the component placement system to retrieve the other components and place the other components on the lead frame.

2. The method of claim 1 further comprising:

placing the lead elements in a row around an inner portion of the lead frame.

3. The method of claim 1 further comprising:

placing the lead elements in multiple rows around an inner portion of the lead frame.

4. The method of claim 1 wherein the lead elements have at least one of a group consisting of: different physical shape and dimensions, and are made from different materials.

5. The method of claim 1 wherein the package is configured as one of a group consisting of: a flat no lead package (FN), a power quad flat no lead (PQFN) package on a single gauge lead frame, a quad flat no lead (QFN) package, and a dual flat no lead (DFN) package.

6. The method of claim 1 further comprising:

operating an automated component placement system to retrieve at least one of the lead elements and place the lead element on the lead frame.

7. The method of claim 1 further comprising:

placing the lead elements in staggered rows around an inner portion of the lead frame.

8. The method of claim 6 wherein:

the lead elements are on tape to load on a reel apparatus on the component placement system.

9. The method of claim 1 wherein:

applying adhesive to retain the lead elements in position once the lead elements are placed on the lead frame, wherein the adhesive is applied to one of a group consisting of: the lead elements, a carrier, and tape attached to the lead frame.

10. A method of fabricating a flat no lead semiconductor package comprising:

using an automated component placement system to access a supply of lead elements;

operating the component placement system to place the lead elements on a lead frame with preformed terminals, wherein the method further comprising providing a supply of other components that is accessible by automated component placement system; operating the component placement system to retrieve the other components and place the components on the lead frame; and connecting the other components to lead elements and the terminals.

Assignments (22)