Copper interconnects separated by air gaps and method of making thereof

1. A method of making a semiconductor device, comprising:

providing a substrate comprising a plurality of sacrificial rails separated by trenches;

sputtering a non-conformal copper layer at a temperature above 150° C. in the trenches and over the sacrificial rails;

heating the semiconductor device to a temperature above 300° C. to reflow the copper layer from the top of the sacrificial rails into the trenches to form copper rails in the trenches;

removing at least a portion of the sacrificial rails after reflowing the copper layer; and

depositing a non-conformal insulating layer over the copper rails such that air gaps are formed between adjacent copper rails, wherein the non-conformal insulating forms a continuous layer over the air gap;

further comprising depositing a conformal liner on the sacrificial rails prior to sputtering the non-conformal copper layer, such that the liner is located on top of the sacrificial rails and covers sidewalls of the trenches;

further comprising depositing a cap layer on a top surface of the copper rails in the trenches, such that the copper rails are sealed by the cap layer on their top surface, the liner on their sidewalls, and at least one of a conductive plug and an interlayer insulating layer on their bottom surface;

further comprising: planarizing the cap layer to remove the cap layer and the liner from a top surface of the sacrificial rails to expose a top surface of the sacrificial rails while leaving a cap on each copper rail in the trenches; and

selectively etching the sacrificial rails to remove at least an upper portion of the sacrificial rails without significantly etching the cap, the liner or the copper rails.

2. The method of claim 1 , wherein:

sputtering the non-conformal copper layer is conducted at a temperature of 175° C. to 250° C.;

reflow of the non-conformal copper layer is conducted at a temperature of 350° C. to 400° C. to form a meniscus in the top surface of the copper rails;

the liner comprises tantalum nitride and the cap comprises tantalum nitride or silicon nitride;

the sacrificial rails comprise a silicon nitride etch stop lower portion and a silicon oxide upper portion;

selectively etching the sacrificial rails to remove at least an upper portion of the sacrificial rails comprises removing the silicon oxide upper portion and stopping on the silicon nitride etch stop lower portion; and

depositing the non-conformal insulating layer comprises depositing a non-conformal silicon oxide layer by PECVD using a silane and at least one of nitrous oxide and ozone sources, such that the silicon oxide layer is located in contact with the cap and an upper portion of the liner on the copper rails.

3. A method of making a semiconductor device., comprising:

providing a substrate comprising a plurality of sacrificial rails separated by trenches;

sputtering a non-conformal copper layer at a temperature above 150° C. in the trenches and over the sacrificial rails;

heating the semiconductor device to a temperature above 300° C. to reflow the copper layer from the top of the sacrificial rails into the trenches to form copper rails in the trenches;

removing at least a portion of the sacrificial rails after reflowing the copper layer: and

depositing a non-conformal insulating layer over the copper rails such that air gaps are formed between adjacent copper rails;

wherein:

the semiconductor device comprises a NAND nonvolatile memory having a NAND memory cell region and a peripheral region; and

the copper rails comprise first copper interconnects for NAND bit lines in the NAND memory cell region;

further comprising second copper interconnects for the NAND peripheral region, wherein the second copper interconnects are deposited into wider and shallower peripheral trenches than the trenches containing the first copper interconnects, such that the second copper interconnects are wider and thinner than the first copper interconnects; and

further comprising:

depositing a cap layer over the first and the second interconnects; and

planarizing the cap layer such that a cap remains in a meniscus on a top surface of the first copper interconnects in the trenches between the sacrificial rails, and such that the cap layer is removed completely over the second copper interconnects which are located in the shallower peripheral trenches.