Method of testing digital-to-analog and analog-to-digital converters
View Patent ↗A method of testing a digital-to-analog or analog-to-digital converter including coarse and fine voltage dividers corresponding respectively to more and less significant bits of the digital signal. Reference input signals are applied corresponding to a first selection of the fine resistor elements with each selection of the coarse resistor elements in succession, corresponding output signals of the converter are measured, and differential non-linearity values and integral non-linearity values for these selections of fine and coarse resistor elements are calculated. Similar measurements and calculations are made for a first selection of the coarse resistor elements with each of the selections of the fine resistor elements in succession. Differential non-linearity values and integral non-linearity values for other combinations of the coarse resistor elements with the fine resistor elements are then calculated using combinations of the calculated differential non-linearity values and the calculated integral non-linearity values.
1. A method of testing a converter for converting between a digital signal and an analog signal one of which is an input signal and the other of which is an output signal, the converter including a coarse voltage divider comprising a set of repetitive coarse resistor elements and a fine voltage divider comprising a set of repetitive fine resistor elements, taps connected to respective positions in said sets of repetitive resistor elements, and a digital tap selector for coupling a selection of said coarse resistor elements with a selection of said fine resistor elements corresponding respectively to more significant and less significant bits of said digital signal, said method of testing comprising:
providing reference input signals corresponding to a first selection of said fine resistor elements with each of said selections of said coarse resistor elements in succession, measuring corresponding output signals of said converter, and using said reference input signals and said output signals to provide calculated differential non-linearity values and integral non-linearity values for said first selection of said fine resistor elements with each of said selections of said coarse resistor elements;
providing reference input signals corresponding to a first selection of said coarse resistor elements with each of said selections of said fine resistor elements in succession, measuring corresponding output signals of said converter, and using said reference input signals and said analog output signals to provide calculated differential non-linearity values and integral non-linearity values for said first selection of said coarse resistor elements with each of said selections of said fine resistor elements; and
calculating differential non-linearity values and integral non-linearity values for other combinations of said coarse resistor elements with said fine resistor elements using combinations of said calculated differential non-linearity values and said calculated integral non-linearity values.
2. The method of testing a converter of claim 1 , further comprising providing reference input signals corresponding to a second selection of said fine resistor elements with each of said selections of said coarse resistor elements in succession, measuring corresponding output signals of said converter, and using said reference input signals and said output signals corresponding to said first and second selections of said fine resistor elements to calculate a correction for integral non-linearity values for said other combinations of said coarse resistor elements with said fine resistor elements.
3. The method of testing a converter of claim 1 , further comprising providing reference input signals corresponding to a second selection of said coarse resistor elements with each of said selections of said fine resistor elements in succession, measuring corresponding output signals of said converter, and using said reference input signals and said output signals corresponding to said first and second selections of said coarse resistor elements to calculate a correction for integral non-linearity values for said other combinations of said coarse resistor elements with said fine resistor elements.
4. The method of testing a converter of claim 1 , wherein said converter is included in an integrated circuit that also includes a data processor for calculating said values.
5. The method of testing a converter of claim 1 , further comprising calculating a gain error for said combinations of said coarse resistor elements with said fine resistor elements.
6. The method of testing a converter of claim 1 , further comprising calculating a full-scale error and a zero-offset error.
7. A method of testing a digital-to-analog converter for converting a digital input signal to an analog output signal, the converter including a coarse voltage divider comprising a set of repetitive coarse resistor elements and a fine voltage divider comprising a set of repetitive fine resistor elements, taps connected to respective positions in said sets of repetitive resistor elements, and a digital tap selector for coupling a selection of said coarse resistor elements with a selection of said fine resistor elements corresponding respectively to more significant bits and less significant bits of said digital input signal, said method of testing comprising:
providing reference digital input signals corresponding to a first selection of said fine resistor elements with each of said selections of said coarse resistor elements in succession, measuring corresponding analog output signals of said converter, and using said reference digital input signals and said analog output signals to provide calculated differential non-linearity values and integral non-linearity values for said first selection of said fine resistor elements with each of said selections of said coarse resistor elements;
providing reference digital input signals corresponding to a first selection of said coarse resistor elements with each of said selections of said fine resistor elements in succession, measuring corresponding analog output signals of said converter, and using said reference digital input signals and said analog output signals to provide calculated differential non-linearity values and integral non-linearity values for said first selection of said coarse resistor elements with each of said selections of said fine resistor elements; and
calculating differential non-linearity values and integral non-linearity values for other combinations of said coarse resistor elements with said fine resistor elements using combinations of said calculated differential non-linearity values and said calculated integral non-linearity values.
8. The method of testing a digital-to-analog converter of claim 7 , and including providing reference digital input signals corresponding to a second selection of said fine resistor elements with each of said selections of said coarse resistor elements in succession, measuring corresponding analog output signals of said converter, and using said reference digital input signals and said analog output signals corresponding to said first and second selections of said fine resistor elements to calculate a correction for integral non-linearity values for said other combinations of said coarse resistor elements with said fine resistor elements.
9. The method of testing a digital-to-analog converter of claim 7 , and including providing reference digital input signals corresponding to a second selection of said coarse resistor elements with each of said selections of said fine resistor elements in succession, measuring corresponding analog output signals of said converter, and using said reference digital input signals and said analog output signals corresponding to said first and second selections of said coarse resistor elements to calculate a correction for integral non-linearity values for said other combinations of said coarse resistor elements with said fine resistor elements.
10. The method of testing a digital-to-analog converter of claim 7 , wherein said digital-to-analog converter is included in an integrated circuit which also includes a data processor for calculating said values.
11. The method of testing a digital-to-analog converter of claim 7 , wherein said digital-to-analog converter is included in an integrated circuit which also includes a reference digital-to-analog converter for providing analog reference signals, and a comparator for providing comparator signals which are a function of a difference between said corresponding analog output signals and said analog reference signals, and said measuring corresponding analog output signals of said converter includes measuring a parameter of said comparator signals.
12. The method of testing a digital-to-analog converter of claim 7 , wherein said digital-to-analog converter is included in an integrated circuit which also includes a reference analog generator for providing digital output equivalence signals representing said corresponding analog output signals of said converter, and said using said reference digital input signals and said analog output signals to provide calculated values includes using said digital output equivalence signals.
13. The method of testing a digital-to-analog converter of claim 7 , and including calculating a gain error for combinations of said coarse resistor elements with said fine resistor elements.
14. The method of testing a digital-to-analog converter of claim 7 , and including calculating a full-scale error and a zero offset error.
15. An integrated circuit including a converter for converting between a digital signal and an analog signal one of which is an input signal and the other of which is an output signal and a BIST (‘built-in self-test’) module, the converter including a coarse voltage divider comprising a set of repetitive coarse resistor elements and a fine voltage divider comprising a set of repetitive fine resistor elements, taps connected to respective positions in said sets of repetitive resistor elements, and a digital tap selector for coupling a selection of said coarse resistor elements with a selection of said fine resistor elements corresponding respectively to more significant bits and less significant bits of said digital signal, said BIST module comprising:
a test input element for providing reference input signals corresponding to a first selection of said fine resistor elements with each of said selections of said coarse resistor elements in succession, a test output element for measuring corresponding output signals of said converter, and a calculation element for using said reference input signals and said output signals to provide calculated differential non-linearity values and integral non-linearity values for said first selection of said fine resistor elements with each of said selections of said coarse resistor elements;
wherein said test input element provides reference input signals corresponding to a first selection of said coarse resistor elements with each of said selections of said fine resistor elements in succession, said test output element being arranged to measure corresponding output signals of said converter, and said calculation element being arranged to use said reference input signals and said analog output signals to provide calculated differential non-linearity values and integral non-linearity values for said first selection of said coarse resistor elements with each of said selections of said fine resistor elements; and
wherein said calculation element calculates differential non-linearity values and integral non-linearity values for other combinations of said coarse resistor elements with said fine resistor elements using combinations of said calculated differential non-linearity values and said calculated integral non-linearity values.
16. The integrated circuit of claim 15 , said test input element being arranged also to provide reference input signals corresponding to a second selection of said fine resistor elements with each of said selections of said coarse resistor elements in succession, said test output element being arranged to measure corresponding output signals of said converter, and said calculation element being arranged to use said reference input signals and said output signals corresponding to said first and second selections of said fine resistor elements to calculate a correction for integral non-linearity values for said other combinations of said coarse resistor elements with said fine resistor elements.
17. The integrated circuit of claim 15 , said test input element being arranged also to provide reference input signals corresponding to a second selection of said coarse resistor elements with each of said selections of said fine resistor elements in succession, said test output element being arranged to measure corresponding output signals of said converter, and said calculation element being arranged to use said reference input signals and said output signals corresponding to said first and second selections of said coarse resistor elements to calculate a correction for integral non-linearity values for said other combinations of said coarse resistor elements with said fine resistor elements.
18. The integrated circuit of claim 15 , said calculation element being arranged also to calculate a gain error for combinations of said coarse resistor elements with said fine resistor elements, and to calculate a full-scale error and a zero-offset error.
19. The integrated circuit of claim 15 , wherein said converter is a digital-to-analog converter, and said integrated circuit also includes a reference digital-to-analog converter for providing analog reference signals and a comparator for providing comparator signals which are a function of a difference between said corresponding analog output signals and said analog reference signals, and said test output element is arranged to measure said corresponding analog output signals of said converter as a function of said comparator signals.
20. The integrated circuit of claim 15 , wherein said converter is a digital-to-analog converter, and said integrated circuit also includes a digital signal generator for providing digital equivalence signals representing said comparator signals, and said calculation element is arranged to use said digital equivalence signals to provide said calculated values.