IP Library Granted Patent US 8,624,408
Granted Patent B2
US 8,624,408 · App. 13/189,121 · Granted Jan 7, 2014

Circuit device and method of manufacturing the same

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Quick Facts
Patent No.
US 8,624,408
App. No.
13/189,121
Granted
Jan 7, 2014
Kind
B2
Abstract

In a circuit device of the present invention, the lower surface side of a circuit board and part of side surfaces thereof are covered with a second resin encapsulant, and the upper surface side and the like of the circuit board are covered with a first resin encapsulant. Since heat dissipation to the outside of the circuit device is achieved mainly through the second resin encapsulant, a particle size of filler contained in the second resin encapsulant is made larger than a particle size of filler contained in the first resin encapsulant. Heat dissipation to the outside of the circuit device is greatly improved.

Claims (16)

1. A circuit device comprising:

a circuit board having a first main surface, a second main surface opposite from the first main surface and a side surface connecting the first and second main surfaces;

a conductive pattern disposed on the first main surface of the circuit board;

a circuit element disposed on the conductive pattern; and

a resin encapsulant covering the circuit board and comprising a first resin encapsulant covering at least the first main surface of the circuit board and part of the side surface of the circuit board and a second resin encapsulant covering at least the second main surface of the circuit board and part of the side surface of the circuit board,

wherein a polymerized region of the first resin encapsulant and the second resin encapsulant is formed beside the side surface of the circuit board, and the polymerized region is located closer to the first main surface than to the second main surface so that a top portion of the polymerized region is located at a position lower than the first main surface of the circuit board.

2. The circuit device according to claim 1 , wherein a particle size of filler contained in the second resin encapsulant is larger than a particle size of filler contained in the first resin encapsulant.

3. The circuit device according to claim 2 , wherein material properties of the filler contained in the second resin encapsulant is different from material properties of the filler contained in the first resin encapsulant, and a thermal conductivity of the filler contained in the second resin encapsulant is larger than a thermal conductivity of the filler contained in the first resin encapsulant.

4. The circuit device according to any one of claims 2 or 3 , wherein the second resin encapsulant is made of a resin obtained by melting and curing a resin sheet formed by pressing a powdered resin and disposed under the second main surface of the circuit board.

5. The circuit device according to claim 2 , wherein a shape of the filler contained in the second resin encapsulant is any one of a crystalline shape and a crushed shape.

6. The circuit device according to claim 3 , wherein a shape of the filler contained in the second resin encapsulant is any one of a crystalline shape and a crushed shape.

7. The circuit device according to claim 2 , wherein the filler contained in the first resin encapsulant is spherical silica, and the filler contained in the second resin encapsulant is alumina.

8. The circuit device according to claim 3 , wherein the filler contained in the first resin encapsulant is spherical silica, and the filler contained in the second resin encapsulant is alumina.

9. The circuit device according to claim 4 , wherein the filler contained in the first resin encapsulant is spherical silica, and the filler contained in the second resin encapsulant is alumina.

10. The circuit device according to claim 5 , wherein the filler contained in the first resin encapsulant is spherical silica, and the filler contained in the second resin encapsulant is alumina.

11. The circuit device according to claim 1 , wherein the circuit board comprises a substrate and an insulating layer disposed on the substrate, and the conductive pattern is disposed on the insulating layer.

Assignments (6)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 24, 2014
From: ON SEMICONDUCTOR TRADING SARL
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 032035/0470 →
CHANGE OF NAME Recorded Jan 23, 2014
From: ON SEMICONDUCTOR TRADING, LTD.
To: ON SEMICONDUCTOR TRADING SARL
Reel/Frame 032143/0286 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 25, 2011
From: MINO, KATSUYOSHI; KANAKUBO, MASARU; IWABUCHI, AKIRA; MOTEGI, MASAMI
To: ON SEMICONDUCTOR TRADING, LTD.
Reel/Frame 026641/0154 →