IP Library Granted Patent US 8,481,367
Granted Patent B2
US 8,481,367 · App. 13/189,155 · Granted Jul 9, 2013

Method of manufacturing circuit device

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Quick Facts
Patent No.
US 8,481,367
App. No.
13/189,155
Granted
Jul 9, 2013
Kind
B2
Abstract

Provided is a method of manufacturing a circuit device in which a circuit element is resin-sealed with sealing resins formed integrally with each other. In the present invention, a resin sheet and a circuit board are housed in a cavity of a mold, and thereafter a first sealing resin formed of a tablet in melted form is injected into the cavity. At the time of injecting the first sealing resin, a second sealing resin formed of the resin sheet in melted form is not yet cured and is maintained in liquid form. Accordingly, the injected first sealing resin and the second sealing resin are mixed at the boundary therebetween, preventing the generation of a gap in the boundary portion and therefore preventing the deterioration of the moisture resistance and withstand voltage at the boundary portion.

Claims (11)

1. A method of manufacturing a circuit device, comprising the steps of:

placing a circuit element and a compressed sheet within a cavity of a mold and loading a resin tablet into a pod of the mold, the resin tablet comprising a first sealing resin and the compressed sheet comprising a second sealing resin; and

resin-sealing the circuit element by injecting a melted first sealing resin of the resin tablet and by melting the second sealing resin of the compressed sheet,

wherein in the resin-sealing step, the melted second sealing resin of the compressed sheet is caused to cure after the injection of the first sealing resin into the cavity, and

an amount of a cure accelerator contained in the second sealing resin of the compressed sheet is smaller than an amount of a cure accelerator contained in the first sealing resin of the resin tablet.

2. The method of manufacturing a circuit device according to claim 1 , wherein a cure time of the second sealing resin of the compressed sheet is longer than a cure time of the first sealing resin of the resin tablet.

3. The method of manufacturing a circuit device according to claim 1 , wherein in the resin-sealing step, the second sealing resin is caused to cure earlier than the first sealing resin.

4. The method of manufacturing a circuit device according to claim 1 , wherein in the step of placing the circuit element, a circuit board on which a hybrid integrated circuit including a plurality of the circuit elements is mounted is placed on a top surface of the compressed sheet, and

in the resin-sealing step, the circuit elements, a top surface of the circuit board and an upper portion of each side surface of the circuit board are covered with the first sealing resin formed of the molten resin tablet, whereas a bottom surface of the circuit board and a lower portion of the side surface of the circuit board are covered with the second sealing resin formed of the molten compressed sheet.

5. The method of manufacturing a circuit device according to claim 1 , wherein in the step of placing the circuit element, an island having a semiconductor element fixed on a top surface thereof is placed on a top surface of the compressed sheet, and

in the resin-sealing step, the semiconductor element, a top surface of the island and an upper portion of each side surface of the island are covered with the first sealing resin formed of the molted resin tablet, whereas a bottom surface of the island and a lower portion of the side surface of the island are covered with the second sealing resin formed of the molten compressed sheet.

Assignments (6)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2014
From: ON SEMICONDUCTOR TRADING SARL
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 033626/0753 →
CHANGE OF NAME Recorded Aug 22, 2014
From: ON SEMICONDUCTOR TRADING, LTD.
To: ON SEMICONDUCTOR TRADING SARL
Reel/Frame 033596/0245 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 26, 2011
From: MINO, KATSUYOSHI; IWABUCHI, AKIRA; NISHIMURA, KO
To: ON SEMICONDUCTOR TRADING, LTD.
Reel/Frame 026648/0910 →