Semiconductor device and method of fabricating the same

1. A method of fabricating a semiconductor device, the method comprising:

forming a multi-depth trench in a semiconductor substrate, the forming of the multi-depth trench comprising:

forming a shallow trench; and

forming a deep trench arranged below the shallow trench;

depositing a first dielectric material into a partial area of the multi-depth trench comprising the shallow trench and the deep trench, the deposited first dielectric material forming a slope in the shallow trench that extends upward from a corner where a horizontal bottom surface of the shallow trench and a vertical sidewall of the deep trench meets, the slope being inclined with respect to the horizontal bottom surface of the shallow trench; and

depositing a second dielectric material into areas of the multi-depth trench in which the first dielectric material is absent.

2. The method of claim 1 , further comprising:

planarizing an upper surface of the second dielectric material using chemical mechanical planarization (CMP).

3. The method of claim 1 , wherein the slope has an angle ranging between 30° and 80° with respect to the horizontal bottom surface of the shallow trench.

4. The method of claim 1 , wherein:

the first dielectric material is deposited by high density plasma chemical vapor deposition (HDP CVD) in the depositing of the first dielectric material; and

the second dielectric material is deposited by low pressure chemical vapor deposition (LP CVD) in the depositing of the second dielectric material.

5. The method of claim 1 , wherein the first dielectric material and the second dielectric material are silicon oxide.

6. The method of claim 1 , wherein the forming of the multi-depth trench further comprises:

forming a first hard mask layer on a surface of the semiconductor substrate, the forming of the first hard mask layer comprising:

forming a pad oxide layer on the surface of the semiconductor substrate; and

forming a pad nitride layer on the pad oxide layer;

forming a second through hole, comprising etching the first hard mask layer;

forming the deep trench, comprising first etching the semiconductor substrate; and

forming the shallow trench, comprising second etching the semiconductor substrate according to the second through hole.

7. The method of claim 6 , wherein the forming of the second through hole further comprises:

forming a first photosensitive layer on the first hard mask layer;

forming a first through hole in the first photosensitive layer using a photolithographic process;

performing the etching of the first hard mask layer according to the first through hole to form the second through hole; and

removing the first photosensitive layer.

8. The method of claim 6 , wherein the forming of the deep trench further comprises:

depositing a second hard mask layer on the first hard mask layer;

coating a second photosensitive layer on the second hard mask layer;

forming a third through hole in the second photosensitive layer using a photolithographic process;

performing the first etching of the semiconductor substrate according to the third through hole to form the deep trench; and

removing the second photosensitive layer and the second hard mask layer in sequence.

9. The method of claim 8 , wherein the second hard mask layer is a silicon oxide layer.

10. The method of claim 1 , wherein:

the first dielectric material and the second dielectric material are charged into the multi-depth trench by chemical vapor deposition (CVD);

the first dielectric material is charged by repeating a first deposition process and a first etching process; and

the second dielectric material is charged only by a second deposition process.

11. The method of claim 10 , wherein the first deposition process is carried out by high density plasma (HDP) CVD using monosilane (SiH 4 ) and oxygen (O 2 ) gases.

12. The method of claim 10 , wherein the first etching process is carried out by an argon sputtering process.

13. A method of fabricating a semiconductor device, the method comprising:

obtaining a multi-depth trench in a semiconductor substrate by forming a first trench and forming a shallow trench at an upper portion of the first trench such that a lower portion of the first trench forms a deep trench arranged below the shallow trench;

depositing a first dielectric material into a partial area of the obtained multi-depth trench, the deposited first dielectric material forming a slope in the shallow trench that extends upward from a corner where a horizontal bottom surface of the shallow trench and a vertical sidewall of the deep trench meets, the slope being inclined with respect to the horizontal bottom surface of the shallow trench; and

depositing a second dielectric material into areas of the multi-depth trench in which the first dielectric material is absent.