IP Library Granted Patent US 8,900,920
Granted Patent B2
US 8,900,920 · App. 13/207,633 · Granted Dec 2, 2014

Semiconductor device and method of forming interconnect structure for encapsulated die having pre-applied protective layer

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Quick Facts
Patent No.
US 8,900,920
App. No.
13/207,633
Granted
Dec 2, 2014
Kind
B2
Abstract

A semiconductor device has a protective layer formed over an active surface of a semiconductor wafer. The semiconductor die with pre-applied protective layer are moved from the semiconductor wafer and mounted on a carrier. The semiconductor die and contact pads on the carrier are encapsulated. The carrier is removed. A first insulating layer is formed over the pre-applied protective layer and contact pads. Vias are formed in the first insulating layer and pre-applied protective layer to expose interconnect sites on the semiconductor die. An interconnect structure is formed over the first insulating layer in electrical contact with the interconnect sites on the semiconductor die and contact pads. The interconnect structure has a redistribution layer formed on the first insulating layer, a second insulating layer formed on the redistribution layer, and an under bump metallization layer formed over the second dielectric in electrical contact with the redistribution layer.

Claims (59)

1. A method of making a semiconductor device, comprising:

providing a semiconductor die;

forming a protective layer over a surface of the semiconductor die and terminating within a boundary of the semiconductor die;

forming a first conductive layer around the semiconductor die;

forming a plurality of vias through the protective layer extending to contact pads formed on the surface of the semiconductor die;

depositing an encapsulant over the semiconductor die and first conductive layer; and

forming an interconnect structure over the protective layer and electrically connected to the first conductive layer, the interconnect structure extending into the vias to electrically connect to the contact pads on the semiconductor die.

2. The method of claim 1 , wherein forming the interconnect structure includes:

forming an insulating layer over the protective layer and encapsulant; and

forming a redistribution layer (RDL) over the insulating layer and extending into the vias to electrically connect to the contact pads on the semiconductor die.

3. The method of claim 2 , further including-forming a bump over the RDL.

4. The method of claim 1 , further including:

forming an insulating layer over the protective layer; and

forming the plurality of vias through the insulating layer and protective layer extending to the contact pads on the semiconductor die.

5. The method of claim 1 , further including disposing a discrete semiconductor component over the first conductive layer.

6. The method of claim 1 , further including forming a second conductive layer through the encapsulant.

7. The method of claim 6 , further including forming an insulating layer over the second conductive layer.

8. A method of making a semiconductor device, comprising:

providing a semiconductor die;

forming a protective layer over a surface of the semiconductor die;

forming a plurality of vias through the protective layer extending to the surface of the semiconductor die;

depositing an encapsulant over the semiconductor die and over a side surface of the protective layer; and

forming an interconnect structure on the protective layer and encapsulant and extending into the vias.

9. The method of claim 8 , further including:

forming an insulating layer over the protective layer; and

forming the plurality of vias through the insulating layer and protective layer extending to the surface of the semiconductor die.

10. The method of claim 8 , wherein forming the interconnect structure includes:

forming an insulating layer over the protective layer and encapsulant; and

forming a redistribution layer (RDL) over the insulating layer and extending into the vias.

11. The method of claim 10 , further including forming a bump over the RDL.

12. The method of claim 8 , further including:

forming a conductive layer around the semiconductor die; and

disposing a discrete semiconductor component over the conductive layer.

13. The method of claim 8 , further including-forming a conductive layer through the encapsulant.

14. The method of claim 13 , further including forming an insulating layer over the conductive layer.

15. A method of making a semiconductor device, comprising:

providing a semiconductor die including a protective layer formed over a surface of the semiconductor die and terminating within a boundary of the semiconductor die;

depositing an encapsulant over the semiconductor die; and

forming an interconnect structure on the protective layer and encapsulant.

16. The method of claim 15 , further including forming a conductive layer around the semiconductor die.

17. The method of claim 16 , further including disposing a discrete semiconductor component over the conductive layer.

18. The method of claim 15 , further including forming a conductive layer through the encapsulant.

19. The method of claim 18 , further including forming an insulating layer over the conductive layer.

20. The method of claim 15 , further including:

forming an insulating layer over the protective layer; and

forming a via through the insulating layer and protective layer extending to the surface of the semiconductor die.

21. The method of claim 20 , wherein forming the interconnect structure includes forming a redistribution layer (RDL) over the insulating layer and extending into the via.

22. A method of making a semiconductor device, comprising:

providing a semiconductor die including a protective layer formed over the semiconductor die;

depositing an encapsulant over the semiconductor die and lateral to the protective layer;

forming an interconnect structure over the protective layer;

forming a first insulating layer over the protective layer; and

forming a via through the first insulating layer and protective layer extending to the semiconductor die.

23. The method of claim 22 , further including forming a first conductive layer around the semiconductor die.

24. The method of claim 23 , further including disposing a discrete semiconductor component over the first conductive layer.

25. The method of claim 23 , further including forming a second conductive layer through the encapsulant.

26. The method of claim 25 , further including forming a second insulating layer over the second conductive layer.

27. The method of claim 22 , wherein forming the interconnect structure includes forming a redistribution layer (RDL) over the first insulating layer and extending into the via.

28. The method of claim 27 , further including forming a bump over the RDL.

Assignments (2)
THIS SUBMISSION IS TO CORRECT A TYPOGRAPHICAL ERROR IN THE COVER SHEET PREVIOUSLY RECORDED ON REEL: 038378 FRAME: 0382 TO CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE." TO "STATS CHIPPAC PTE. LTD." Recorded Sep 6, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064869/0363 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0382 →