IP Library Patent Application 13210152
Patent Application
App. No. 13/210,152

Solder Bump Bonding In Semiconductor Package Using Solder Balls Having High-Temperature Cores

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Quick Facts
Patent No.
US None
App. No.
13/210,152
Abstract

A semiconductor die is solder bump-bonded to a leadframe or circuit board using solder balls having cores made of a material with a melting temperature higher than the melting temperature of the solder to ensure that in the finished structure the die is parallel to the leadframe or circuit board.

Claims (28)

1 . A bump-on-leadframe semiconductor package comprising a die and a lead, the die and the lead being spaced apart, a contact pad on a surface of the die, an electrical connection being formed between the contact pad and the lead, the electrical connection comprising a solder surface layer and a high-temperature core, the high-temperature core being laterally surrounded by solder surface layer, the solder surface layer being in contact with the contact pad and the lead such that the high-temperature core is completely enclosed by the lead, the contact pad and the solder surface layer, wherein the high-temperature core has a higher melting temperature than the solder surface layer.

2 . The bump-on-leadframe semiconductor package of claim 1 wherein the high-temperature core comprises an electrically conductive material.

3 . The bump-on-leadframe semiconductor package of claim 2 wherein the high-temperature core comprises a metal.

4 . The bump-on-leadframe semiconductor package of claim 3 wherein the high-temperature core comprises a metal selected from the group consisting of copper, aluminum and the refractory metals.

5 . The bump-on-leadframe semiconductor package of claim 1 wherein the high-temperature core comprises an electrically nonconductive material.

6 . The bump-on-leadframe semiconductor package of claim 5 wherein the high-temperature core comprises a material selected from the group consisting of the plastics, the ceramic materials and silicon dioxide.

7 . The bump-on-leadframe semiconductor package of claim 1 comprising a plurality of the contact pads, a plurality of the electrical connections and a plurality of the leads, wherein each of the contact pads is connected to one of the lead by means of one of the electrical connections.

8 . The bump-on-leadframe semiconductor package of claim 7 wherein the package comprises a leaded package wherein the die, the electrical connections and a portion of each of the leads are encapsulated in a plastic material.

9 . The bump-on-leadframe semiconductor package of claim 8 wherein each of the leads is a gull-winged lead.

10 . The bump-on-leadframe semiconductor package of claim 8 wherein each of the leads is a reverse gull-winged lead.

11 . The bump-on-leadframe semiconductor package of claim 8 further comprising a heat slug, the die being connected to the heat slug by means of a connection similar to the electrical connections.

12 . The bump-on-leadframe semiconductor package of claim 7 wherein the package comprises a no-lead package wherein the die and the electrical connections are encapsulated in a plastic material and wherein the leads are partially encapsulated in the plastic material, the plastic material being formed in the shape of a rectangular solid, an exposed surface of each of the leads being coplanar with a surface of the plastic material.

13 . The bump-on-leadframe semiconductor package of claim 12 wherein a first lead on one side of the package is asymmetrical with respect to a second lead on an opposite side of the package.

14 . The bump-on-leadframe semiconductor package of claim 12 further comprising a heat slug, the die being connected to the heat slug by means of a connection similar to the electrical connections.

15 . A chip-scale semiconductor package comprising a semiconductor die mounted on a printed circuit board, the die comprising a plurality of contact pads, each of the contact pads being connected to a circuit path in the printed circuit board by means of an electrical connection, each of the electrical connections comprising a solder surface layer and a high-temperature core, the high-temperature core being laterally surrounded by the solder surface layer, the solder surface layer being in contact with the contact pad and the circuit path such that the high-temperature core is completely enclosed by the circuit path, the contact pad and the solder surface layer, wherein the high-temperature core has a higher melting temperature than the solder surface layer.

16 . The chip-scale semiconductor package of claim 15 wherein the high-temperature core comprises an electrically conductive material.

17 . The chip-scale semiconductor package of claim 16 wherein the high-temperature core comprises a metal.

18 . The chip-scale semiconductor package of claim 17 wherein the high-temperature core comprises a metal selected from the group consisting of copper, aluminum and the refractory metals.

19 . The chip-scale semiconductor package of claim 15 wherein the high-temperature core comprises an electrically nonconductive material.

20 . The chip-scale semiconductor package of claim 19 wherein the high-temperature core comprises a material selected from the group consisting of a plastic material, a ceramic material and silicon dioxide.

21 . A method of forming an electrical connection between a contact pad on a semiconductor die and an external circuit path, the method comprising:

providing a solder ball, the solder ball comprising a high-temperature core and a solder shell, the high-temperature core being enclosed by the solder shell, the high-temperature core having a higher melting temperature than the solder shell;

positioning the solder ball such that the solder ball is in contact with the contact pad and the external circuit path; and

heating the solder ball to a temperature above the melting temperature of the solder shell but below the melting temperature of the high-temperature core.

22 . The method of claim 21 wherein positioning the solder ball such that the solder ball is in contact with the contact pad and the external circuit path comprises causing the solder ball to rest on the contact pad and causing the external circuit path to rest on the solder ball.

23 . The method of claim 22 wherein the contact pad comprises an under bump metal member, the under bump metal member having a concave surface in contact with the solder ball.

24 . The method of claim 22 wherein positioning the solder ball such that the solder ball is in contact with the contact pad and the external circuit comprises initially causing the solder ball to rest on the contact pad, then heating the contact pad to melt a portion of the shell and thereby cause the solder ball to adhere to the contact pad, and then causing the external circuit path to rest on the solder ball.

25 . The method of claim 21 wherein the high-temperature material is selected from the group consisting of a plastic material, a ceramic material, and silicon dioxide.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2025
From: ADVANCED ANALOGIC TECHNOLOGIES INCORPORATED
To: SKYWORKS SOLUTIONS, INC.
Reel/Frame 071234/0320 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 19, 2011
From: WILLIAMS, RICHARD K.
To: ADVANCED ANALOGIC TECHNOLOGIES, INC.
Reel/Frame 026778/0385 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 19, 2011
From: LIN, KENG HUNG
To: ADVANCED ANALOGIC TECHNOLOGIES (HONG KONG) LIMITED
Reel/Frame 026778/0873 →