IP Library Granted Patent US 8,767,482
Granted Patent B2
US 8,767,482 · App. 13/213,018 · Granted Jul 1, 2014

Apparatuses, devices and methods for sensing a snapback event in a circuit

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Quick Facts
Patent No.
US 8,767,482
App. No.
13/213,018
Granted
Jul 1, 2014
Kind
B2
Abstract

Example subject matter disclosed herein relates to apparatuses and/or devices, and/or various methods for use therein, in which an application of an electric potential to a circuit may be initiated and subsequently changed in response to a determination that a snapback event has occurred in a circuit. For example, a circuit may comprise a memory cell that may experience a snapback event as a result of an applied electric potential. In certain example implementations, a sense circuit may be provided which is responsive to a snapback event occurring in a memory cell to generate a feed back signal to initiate a change in an electric potential applied to the memory cell.

Claims (26)

1. A method comprising:

initiating application of an electric potential to a circuit; and

initiating a change in the application of the electric potential in response to a determination that a snapback event has occurred in the circuit,

wherein the circuit is capable of producing a plurality of snapback event levels, and

wherein initiating the application of the electric potential to the circuit further comprises differentiating between the plurality of snapback event levels based, at least in part, by selecting the electric potential for a particular one of the plurality of snapback event levels.

2. A method comprising:

initiating application of an electric potential to a circuit; and

initiating a change in the application of the electric potential in response to a determination that a snapback event has occurred in the circuit,

wherein the circuit is capable of producing a plurality of snapback event levels, and

wherein initiating the application of the electric potential to the circuit further comprises differentiating between the plurality of snapback event levels based, at least in part, by setting a threshold voltage level for use in determining that a particular one of the plurality of snapback event levels has occurred.

3. The method as recited in claim 1 , and further comprising:

limiting an electric current through the circuit.

4. The method as recited in claim 3 , wherein limiting the electric current through the circuit further comprises:

limiting the electric current to an amount that exceeds a leakage current threshold.

5. The method as recited in claim 1 , wherein the circuit comprises a memory cell and further comprising:

determining a state of the memory cell based, at least in part, on a determination as to whether the snapback event has occurred.

6. The method as recited in claim 5 , and further comprising:

initiating application of a programming electric signal to the memory cell based, at least in part, on the state of the memory cell.

7. The method as recited in claim 1 , and further comprising:

in response to a determination that a period of time has passed since initiating the application of the electric potential, initiating the change in the application of the electric potential.

8. The method as recited in claim 1 , wherein the circuit comprises a memory cell and initiating the application of the electric potential further comprises:

selecting the electric potential based, at least in part, on a particular state of the memory cell to be detected.

9. The method as recited in claim 1 , wherein initiating the change in the application of the electrical potential is after the change in the electrical potential resulting from the snapback event.

10. The method as recited in claim 1 , wherein initiating the change in the application of the electrical potential comprises stopping the generation of the electrical potential.

11. The method as recited in claim 1 , wherein the circuit comprises a memory cell and wherein, when the memory cell is in a first state, the memory cell generates the snapback event in response to the application of the electrical potential.

12. The method as recited in claim 1 , wherein the circuit comprises a memory cell and wherein, when the memory cell is in a second state, the memory cell does not generate the snapback event in response to the application of the electrical potential, and wherein the electric potential applied is removed after a period of time has passed.

Assignments (9)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 26, 2011
From: NUMONYX B.V.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 027126/0176 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 18, 2011
From: HIRST, JEREMY; CASTRO, HERNAN; TANG, STEPHEN
To: MICRON TECHNOLOGY, INC.
Reel/Frame 026774/0720 →