IP Library Granted Patent US 8,423,722
Granted Patent B1
US 8,423,722 · App. 13/219,555 · Granted Apr 16, 2013

System and method for high performance command processing in solid state drives

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Quick Facts
Patent No.
US 8,423,722
App. No.
13/219,555
Granted
Apr 16, 2013
Kind
B1
Abstract

Solid State Drives (SSD) can yield very high performance if it is designed properly. A SSD typically includes both a front end that interfaces with the host and a back end that interfaces with the flash media. Typically SSDs include flash media that is designed with a high degree of parallelism that can support a very high bandwidth on input/output (I/O). A SSD front end designed according to a traditional hard disk drive (HDD) model will not be able to take advantage of the high performance offered by the typical flash media. Embodiments of the invention provide improved management of multiple I/O threads that take advantage of the high performing and concurrent nature of the back end media, so the resulting storage system can achieve a very high performance.

Claims (58)

1. A non-volatile memory storage system, comprising:

non-volatile storage comprising a plurality of solid-state storage devices; and

control circuitry configured to implement:

an interface to a host system, the interface configured to receive a plurality of commands from the host system; and

a data manager module configured to issue one or more data access requests to the non-volatile storage in response to instructions received from the interface based on the commands from the host system;

wherein the instructions are communicated via one of two data paths in the non-volatile memory storage system, the two data paths including:

a standard performance data path; and

a high performance data path comprising:

volatile memory for storing data control structures containing (1) the instructions from the interface to the data manager module and (2) responses to those instructions from the data manager module; and

a memory buffer for storing data that are to be transferred between the host system and the non-volatile storage, the data being associated with the commands received from the host system;

wherein the data manager module is configured to concurrently process a plurality of instructions from the interface stored in their associated data control structures; and

wherein each of the data control structures includes information related to processing of a command from the host system, wherein both the interface and the data manager module are configured to update the information independently, so that the processing of the command can be performed without delay due to copying of command related data from the interface to the data manager module.

2. The non-volatile memory storage system of claim 1 , wherein at least one of the data control structures is pre-configured with command processing information including information related to a data transfer size, so that a command requesting a data transfer size that is smaller than the pre-configured data transfer size can be serviced by the at least one pre-configured data control structure without additional processing to derive the pre-configured command processing information.

3. The non-volatile memory storage system of claim 1 , wherein each data control structure is associated with a pre-set buffer allocation from the memory buffer, the buffer allocation being used for receiving the data to be transferred for the command associated with the respective data control structure.

4. The non-volatile memory storage system of claim 1 , wherein the interface is configured to:

in response to receiving a data access command from the host system, communicate an instruction to the data manager module in one of the data control structures.

5. The non-volatile memory storage system of claim 4 , wherein the data access command is a write command and wherein the instruction is communicated to the data manager module ahead of the completion of transfer of data from the host system into the memory buffer, so that the processing of the command can take place concurrently with the transfer of data from the host system into the memory buffer.

6. The non-volatile memory storage system of claim 4 , wherein the data manager module is configured to:

upon detecting the instruction from the interface in one of the data control structures, process the instruction by performing one or more logical to physical mapping operations; and

when the instruction is for a write command, upon detection of completion of the transfer of the associated data in the memory buffer, issue a plurality of data access requests to the non-volatile storage so that the requests can be executed in parallel in the plurality of solid-state storage devices; and

when the instruction is for a read command, issue a plurality of data access requests to the non-volatile storage so that the requests can be executed in parallel in the plurality of solid-state storage devices.

7. The non-volatile memory storage system of claim 6 , wherein the data manager module is configured to:

coalesce status updates from the plurality of solid-state storage devices; and

update the data control structure associated with the instruction with information related to the coalesced status updates.

8. The non-volatile memory storage system of claim 7 , wherein the status updates include one or more of: an error notification and a completion notification.

9. The non-volatile memory storage system of claim 1 , wherein the plurality of solid-state storage devices comprise dies.

10. The non-volatile memory storage system of claim 1 , wherein the number of data control structures match a maximum number of commands from the host system that can be processed in the storage system at a given time, such that each command is associated with a data control structure.

11. The non-volatile memory storage system of claim 10 , wherein the maximum number of commands from the host system matches a queue depth in the non-volatile memory storage system that is used to receive commands from the host system in accordance with a specification.

12. The non-volatile memory storage system of claim 1 , wherein the control circuitry comprise one or more processors.

13. A method of processing commands in a solid-state storage system comprising non-volatile storage that comprises a plurality of solid-state storage devices, the method comprising:

receiving, by an interface, a plurality of commands from a host system; and

issuing, by a data manager module, one or more data access requests to the non-volatile storage in response to instructions that are sent by the interface based on the commands from the host system;

wherein the instructions are communicated via a high performance data path in the solid-state storage system, the high performing data path comprising:

volatile memory for storing data control structures containing (1) the instructions from the interface to the data manager module and (2) responses to those instructions from the data manager module; and

a memory buffer for storing data that are to be transferred between the host system and the non-volatile storage, the data being associated with the commands received from the host system; and

wherein each of data control structures includes information related to processing of one of the commands from the host system and is configured to be updated by both the interface and the data manager module.

14. The method of claim 13 , wherein at least one of the data control structures is pre-configured with command processing information including information related to a data transfer size, so that a command requesting a data transfer size that is smaller than the pre-configured data transfer size can be serviced by the at least one pre-configured data control structure without additional processing to derive the pre-configured command processing information.

15. The method of claim 13 , wherein each data control structure is associated with a pre-set buffer allocation from the memory buffer, the buffer allocation being used for receiving the data to be transferred for the command associated with the respective data control structure.

16. The method of claim 13 , further comprising:

in response to receiving a data access command from the host system, communicating, by the interface, an instruction to the data manager module in one of the data control structures.

17. The method of claim 16 , wherein the data access command is a write command and wherein the instruction is communicated to the data manager module ahead of the completion of transfer of data from the host system into the memory buffer.

18. The method of claim 16 , further comprising:

upon detecting the instruction from the interface in one of the data control structures, processing, by the data manager module, the instruction by performing one or more logical to physical mapping operations; and

when the instruction is for a write command, upon detection of completion of the transfer of the associated data in the memory buffer, issuing, by the data manager module, a plurality of data access requests to the non-volatile storage so that the requests can be executed in parallel in the plurality of solid-state storage devices; and

when the instruction is for a read command, issuing, by the data manager module, a plurality of data access requests to the non-volatile storage so that the requests can be executed in parallel in the plurality of solid-state storage devices.

19. The method of claim 18 , further comprising:

coalescing, by the data manager module, status updates from the plurality of solid-state storage devices; and

updating, by the data manager module, the data control structure associated with the instruction with information related to the coalesced status updates.

20. The method of claim 19 , wherein the status updates include one or more of: an error notification and a completion notification.

21. The method of claim 13 , further comprising: concurrently processing, by the data manager module, a plurality of instructions from the interface stored in their associated data control structures.

22. A non-volatile memory storage system, comprising:

non-volatile storage comprising a plurality of solid-state storage devices;

control circuitry configured to implement:

an interface to a host system, the interface configured to receive a plurality of commands from the host system; and

a data manager module configured to:

issue one or more data access requests to the non-volatile storage in response to instructions sent by the interface based on the commands from the host system; and

volatile memory configured to store data control structures through which said instructions are communicated, the data control structures comprising information related to processing of said commands from the host system, wherein both the interface and the data manager module are configured to update said information independently.

23. The non-volatile memory storage system of claim 22 , wherein at least one of the data control structures is pre-configured with command processing information including information related to a pre-set data transfer size, so that a command requesting a data transfer size that is smaller than the pre-set data transfer size can be serviced by the at least one pre-configured data control structure without additional processing to derive the pre-configured command processing information.

Assignments (11)
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 038744 FRAME 0481 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0556 →
RELEASE OF SECURITY INTEREST Recorded Mar 5, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 045501/0714 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038744/0481 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038744/0281 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038722/0229 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 29, 2011
From: DEFOREST, MARVIN R.; CALL, MATTHEW; SYU, MEI-MAN L.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 026823/0920 →