IP Library Granted Patent US 8,742,555
Granted Patent B2
US 8,742,555 · App. 13/220,898 · Granted Jun 3, 2014

Lead frame having a flag with in-plane and out-of-plane mold locking features

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Quick Facts
Patent No.
US 8,742,555
App. No.
13/220,898
Granted
Jun 3, 2014
Kind
B2
Abstract

A semiconductor device lead frame having enhanced mold locking features is provided. The lead frame has a flag with bendable edge features along the edge of the flag. Each edge feature is shaped to resist movement against encapsulating mold material in a plane of the edge feature. By bending a portion of the edge feature, improved mold locking of the flag is provided in multiple planes.

Claims (46)

1. A packaged electronic device comprising:

a lead frame comprising a flag lying in a first plane defined by a body of the flag, wherein

the flag comprises a plurality of flag edge features located along a perimeter of the flag,

a first flag edge feature is bent near a connection with the flag such that a majority of the first flag edge feature lies in a second plane other than the first plane, and

a second flag edge feature is bent near a connection with the flag such that the majority of the second flag edge feature lies in a third plane other than the first and second planes; and

a cured mold compound encapsulating at least a portion of the flag and the first flag edge feature, wherein

each flag edge feature comprises corresponding first and second ends,

the first end of each flag edge feature is attached to the flag, and

the second end of each flag edge feature is formed to resist movement of the mold compound in a direction of the plane of the flag edge feature where the mold compound comes in contact with the flag edge feature.

2. The packaged electronic device of claim 1 wherein the second end of the first flag edge feature is formed to resist movement of the mold compound by virtue of being wider than the first end of the first flag edge feature.

3. The packaged electronic device of claim 2 wherein the second end of the first flag edge feature is approximately twice as wide as the first edge of the first flag edge feature.

4. The packaged electronic device of claim 1 wherein the lead frame further comprises:

one or more leads arranged around the flag; and

a die, adhesively coupled to a first major surface of the flag along a major surface of the die, and comprising one or more connection pads, wherein

a connection pad of the one or more connection pads is conductively coupled to a lead of the one or more leads.

5. A packaged electronic device comprising:

a lead frame comprising a flag lying in a first plane defined by a body of the flag, wherein

the flag comprises a plurality of flag edge features located along a perimeter of the flag,

a first flag edge feature is bent near a connection with the flag such that a majority of the first flag edge feature lies in a second plane other than the first plane, and

alternating flag edge features of the plurality of flag edge features are bent; and

a cured mold compound encapsulating at least a portion of the flag and the first flag edge feature, wherein

each flag edge feature comprises corresponding first and second ends,

the first end of each flag edge feature is attached to the flag, and

the second end of each flag edge feature is formed to resist movement of the mold compound in a direction of the plane of the flag edge feature where the mold compound comes in contact with the flag edge feature.

6. The packaged electronic device of claim 5 wherein each of the bent flag edge features are bent from the first plane at a same angle.

7. The packaged electronic device of claim 6 wherein the same angle is 90 degrees from the first plane.

8. The packaged electronic device of claim 5 , wherein

a first subset of the bent flag edge features are bent from the first plane at a first angle,

a second subset of the bent flag edge features are bent from the first plane at a second angle, and

the first and second angles are different.

9. The packaged electronic device of claim 1 , wherein

the flag exhibits a first thickness, and

each flag edge feature exhibits a second thickness, wherein the second thickness is less than the first thickness.

10. The packaged electronic device of claim 9 , wherein the first flag edge feature exhibits a length from the first end to the second end that is greater than the first thickness.

11. The packaged electronic device of claim 10 wherein the length of the first flag edge feature is about twice the first thickness.

12. A lead frame for a packaged electronic device, the lead frame comprising:

a flag comprising a plurality of flag edge features located along a perimeter of the flag, wherein

the flag lies in a plane defined by a body of the flag, and

a first flag edge feature of the plurality of flag edge features is bent near a connection with the flag such that a majority of the first flag edge feature lies in a second plane other than the first plane, and

a second flag edge feature of the plurality of flag edge features lies in the plane of the flag; and

leads arranged around the flag.

13. The lead frame of claim 12 wherein the first flag edge feature comprises:

a first end attached to the flag; and

a second end formed to resist movement of a cured mold compound in a direction along the second plane.

14. The lead frame of claim 13 wherein the second end of the first flag edge feature is formed to resist movement of the cured mold compound by virtue of being wider than the first end of the first flag edge feature.

15. The lead frame of claim 14 wherein the second end of the first flag edge feature is approximately twice as wide as the first end of the first flag edge feature.

Assignments (22)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 044209/0047 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0285 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0387 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0334 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027622/0477 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027622/0075 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027621/0928 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 30, 2011
From: WEN, JIAN; FREAR, DARREL R.; MCDONALD, WILLIAM G.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 026827/0186 →