Methods for forming antifuses with curved breakdown regions
View Patent ↗Methods are disclosed for forming an antifuse that includes first and second conductive regions having spaced-apart curved portions, with a first dielectric region therebetween, forming in combination with the curved portions a curved breakdown region adapted to switch from a substantially non-conductive initial state to a substantially conductive final state in response to a predetermined programming voltage. A sense voltage less than the programming voltage is used to determine the state of the antifuse as either OFF (high impedance) or ON (low impedance). A shallow trench isolation (STI) region is desirably provided adjacent the breakdown region to inhibit heat loss from the breakdown region during programming. Lower programming voltages and currents are observed compared to antifuses using substantially planar dielectric regions. In a further embodiment, a resistive region is inserted in one lead of the antifuse with either planar or curved breakdown regions to improve post-programming sense reliability.
1. A method for forming an antifuse, comprising:
providing a substrate having an upper surface;
forming a cavity extending a predetermined distance into the substrate from the upper surface;
filling the cavity with a dielectric having a central region depressed from the upper surface;
forming a curved dielectric region on a curved portion of the surface of the substrate adjacent the cavity and extending toward the central region; and
depositing a conductor having a curved portion overlying the curved dielectric region, thereby forming a breakdown region comprising the curved portion of the conductor and the curved portion of the substrate on either side of the curved dielectric region.
2. The method of claim 1 , wherein the curved dielectric region is formed by oxidation of the curved portions the substrate.
3. The method of claim 1 , wherein, the filling step comprises depositing a dielectric into the cavity and over the upper surface and then removing portions of the dielectric over the upper surface so as to leave other portions of the dielectric in the cavity.
4. The method of claim 3 , wherein prior to the step of depositing the dielectric, exposed surfaces of the cavity are treated to form an oxide region thereon.
5. The method of claim 1 , wherein the curved dielectric region has a thickness in a range of about 1 to 10 nanometers.
6. A method for forming an antifuse, comprising:
providing a semiconductor substrate having an upper surface;
forming a first dielectric region having a curved lip at the upper surface;
forming a first conductive region in the substrate on a side of the first dielectric region, the first conductive region having a curved portion underlying the curved lip;
forming a second conductive region over the first dielectric region and the curved lip, thereby forming, in combination with the curved portion of the first semiconductor region, a curved breakdown region adapted to switch from a substantially non-conductive state to a substantially conductive state in response to a predetermined applied programming voltage; and
forming a second dielectric region substantially thicker than the first dielectric region located adjacent the first dielectric region;
wherein the first and second conductive regions are doped semiconductor regions, and wherein the second dielectric region comprises a dielectric filled cavity in the substrate.
7. The method of claim 6 , wherein the second conductive region is a substantially polycrystalline semiconductor region, and the first conductive region is a substantially single crystal semiconductor region.
8. The method of claim 6 , wherein forming the first and second conductive regions comprises doping the substrate, and forming the first dielectric region comprises oxidizing the substrate.
9. The method of claim 6 , wherein the second dielectric region comprises a dielectric formed by chemical vapor deposition.
10. The method of claim 6 , where in the second dielectric region comprises a dielectric formed in part by thermal oxidation and in part by deposition.
11. The method of claim 6 , wherein the first dielectric region is a thermally grown oxide region.
12. The method of claim 6 , wherein the curved lip has a thickness in a range of 1 to 10 nanometers.
13. A method for forming an antifuse having first and second terminals, comprising:
providing a substrate having a first surface;
forming a first conductive region adjacent the first surface and coupled to the first terminal;
forming a dielectric region in contact with the first conductive region;
forming a second conductive region having a first portion overlying the dielectric region, a second portion spaced apart from the dielectric region, and a third portion spaced apart from the second portion and the dielectric region;
forming a first contact coupled to the second terminal and ohmically coupled to the first portion of the second conductive region; and
forming a second contact coupled to the second terminal and ohmically coupled to the third portion of the second conductive region,
wherein the first portion of the second conductive region provides a first resistance between the first contact and the dielectric region, and the second portion of the second conductive region provides a second resistance between the second contact and the dielectric region, wherein the second resistance is higher than the first resistance.
14. The method of claim 13 , wherein the dielectric region is substantially planar.
15. The method of claim 13 , wherein the dielectric region has a thickness in a range of 1 to 10 nanometers.
16. The method of claim 13 , wherein the dielectric region is curved.
17. The method of claim 13 , wherein the second conductive region is a doped semiconductor, and the second portion has a lower doping than the first and third portions.