IP Library Granted Patent US 8,291,133
Granted Patent B2
US 8,291,133 · App. 13/229,774 · Granted Oct 16, 2012

Skip based control logic for first in first out buffer

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,291,133
App. No.
13/229,774
Granted
Oct 16, 2012
Kind
B2
Abstract

Skip based control logic for first in first out buffer is disclosed. In one embodiment, an isochronous data packet placed in an isochronous receive first in first out (IRFIFO) buffer coupled to an isochronous receive direct memory access (IRDMA) is detected. Further, a header of the isochronous data packet is read. Furthermore, a validity of the isochronous data packet is determined. Also, a read operation of remaining data of the isochronous data packet is skipped if the isochronous data packet is determined as invalid.

Claims (18)

1. A method for a host controller interface (HCI), comprising:

detecting an isochronous data packet placed in an isochronous receive first in first out (IRFIFO) buffer coupled to an isochronous receive direct memory access (IRDMA);

reading a header of the isochronous data packet;

determining a validity of the isochronous data packet; and

skipping a read operation of remaining data of the isochronous data packet by incrementing a read pointer of the IRFIFO buffer based on a skip parameter of a skip register if the isochronous data packet is determined as invalid, wherein skipping the read operation comprises:

setting a current location of the read pointer to a current location of a write pointer if a value of the skip parameter is greater than zero and a data count of the isochronous data packet.

2. The method of claim 1 , wherein the determining the validity of the isochronous data packet comprises:

extracting a channel number and packet filtering controls from the header; and

comparing the channel number and the packet filtering controls with contents of control registers associated with the IRDMA.

3. A non-transitory machine-readable medium embodying a set of instructions that, when executed by a machine, causes the machine to perform the method of claim 1 .

4. The method of claim 1 , wherein the skip parameter is set to a null value if the isochronous data packet is determined as valid for the read operation.

5. The method of claim 1 , wherein skipping the read operation further comprises:

decreasing the value of the skip parameter by the data count upon setting the current location of the read pointer to the current location of the write pointer; and

setting the data count to zero, wherein the setting the data count to zero further comprises performing another write operation with additional data.

6. The method of claim 5 , further comprising setting the read pointer by increasing the current location of the read pointer by the value of the skip parameter if a size of the additional data is greater than the value of the skip parameter.

7. The method of claim 6 , wherein the increasing the current location of the read pointer by the value of the skip parameter further comprises decreasing the size of the additional data by the value of the skip parameter.

8. The method of claim 1 , wherein skipping the read operation further comprises increasing the current location of the read pointer by the value of the skip parameter if the data count of the isochronous data packet is greater than the value of the skip parameter.

9. The method of claim 8 , wherein the increasing the current location of the read pointer by the value of the skip parameter further comprises decreasing the data count by the value of the skip parameter.

Assignments (5)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS AT REEL/FRAME NO. 32856/0031 Recorded May 29, 2015
From: DEUTSCHE BANK AG NEW YORK BRANCH
To: LSI CORPORATION
Reel/Frame 035797/0943 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2015
From: LSI CORPORATION
To: INTEL CORPORATION
Reel/Frame 035090/0477 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 12, 2011
From: RAIKAR, RAYESH KASHINATH; KOMMINENI, VIJAYA BHASKAR; AKULA, SANTOSH KUMAR; KOTIKALAPUDI, RANJITH KUMAR; GANGADHAR, VINAY
To: LSI CORPORATION
Reel/Frame 026884/0862 →