IP Library Granted Patent US 8,497,453
Granted Patent B2
US 8,497,453 · App. 13/235,754 · Granted Jul 30, 2013

Semiconductor device having variable parameter selection based on temperature

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Quick Facts
Patent No.
US 8,497,453
App. No.
13/235,754
Granted
Jul 30, 2013
Kind
B2
Abstract

A semiconductor device that may include temperature sensing circuits is disclosed. The temperature sensing circuits may be used to control various parameters, such as internal regulated supply voltages, internal refresh frequency, a word line low voltage, or the like. In this way, operating specifications of a semiconductor device at worse case temperatures may be met without compromising performance at normal operating temperatures. Each temperature sensing circuit may include a selectable temperature threshold value as well as a selectable temperature hysteresis value. In this way, temperature performance characteristics may be finely tuned. Furthermore, a method of testing the temperature sensing circuits is disclosed in which a current value may be monitored an temperature threshold values and temperature hysteresis values may be thereby determined.

Claims (47)

1. A method comprising:

sensing a first temperature with a first temperature-sensing circuit, wherein the first temperature-sensing circuit includes:

a first amplifier comprising a first positive input and a first negative input, wherein the first negative input is configured to be driven by a temperature-independent signal;

a first transistor electrically coupled to the first positive input, wherein the first transistor is configured to be controlled by a temperature signal; and

a first temperature threshold resistance and a first hysteresis resistance both electrically coupled in series to the first positive input, wherein the first hysteresis resistance is configured to be controlled, at least in part, by an output of the first amplifier;

generating a first word line disable voltage based on the output of the first amplifier; and

driving a word line with the first word line disable voltage.

2. The method of claim 1 , wherein the first word line disable voltage is a negative voltage with respect to a ground voltage.

3. The method of claim 1 , wherein the first temperature threshold resistance is configured to be programmable.

4. The method of claim 1 , wherein the first temperature threshold resistance comprises a first temperature threshold value and the first hysteresis resistance comprises a first temperature hysteresis value.

5. The method of claim 4 , wherein the first hysteresis resistance is configured to be programmable.

6. The method of claim 1 , further comprising:

sensing a second temperature with a second temperature-sensing circuit, wherein the second temperature-sensing circuit includes:

a second amplifier including a second positive input and a second negative input, wherein the second negative input is configured to be driven by the temperature- independent signal;

a second transistor electrically coupled to the second positive input, wherein the second transistor is configured to be controlled by the temperature signal; and

a second temperature threshold resistance and a second hysteresis resistance both electrically coupled in series to the second positive input, wherein the second hysteresis resistance is configured to be controlled, at least in part, by an output of the second amplifier;

generating a second word line disable voltage based on the output of the second amplifier; and

driving the word line with the second word line disable voltage.

7. The method of claim 6 , wherein the second word line disable voltage is less than the first word line disable voltage.

8. The method of claim 1 , wherein the method is performed on a semiconductor memory device comprising at least one of a dynamic random access memory (DRAM) device, a static random access memory (SRAM) device, or a random access memory (RAM) device.

9. The method of claim 1 , wherein said generating a first word line disable voltage comprises using a negative voltage generator.

10. The method of claim 1 , further comprising providing the temperature-independent signal by using a band gap reference circuit.

11. The method of claim 1 , wherein the output of the first amplifier comprises a temperature indication signal.

12. An apparatus comprising:

a temperature-sensing circuit including:

an amplifier comprising a positive input, a negative input, and an output, wherein the first negative input is configured to be driven by a temperature-independent signal, and wherein the output is associated with a binary temperature indication;

a transistor electrically coupled to the first positive input, wherein the transistor is configured to be controlled by a temperature signal; and

a temperature threshold resistance associated with a temperature threshold value and a hysteresis resistance associated with a hysteresis value, wherein the temperature threshold resistance and the hysteresis resistance are both electrically coupled in series to the first positive input, and wherein the hysteresis resistance is configured to be controlled, at least in part, by the output of the amplifier; and

a word line driving circuit configured to provide a word line disable voltage based on the binary temperature indication.

13. The apparatus of claim 12 , wherein the word line driving circuit is further configured to drive at least one of a dynamic random access memory (DRAM) device, a static random access memory (SRAM) device, or a random access memory (RAM) device.

14. The apparatus of claim 12 , wherein the temperature threshold resistance and the hysteresis resistance are both configured to be programmable.

15. The apparatus of claim 12 , wherein the temperature-independent signal is configured to be provided by a band gap reference signal.

16. A system comprising:

a first temperature-sensing circuit including:

a first amplifier comprising a first positive input and a first negative input, wherein the first negative input is configured to be driven by a temperature-independent signal;

a first transistor electrically coupled to the first positive input, wherein the first transistor is configured to be controlled by a temperature signal; and

a first temperature threshold resistance and a first hysteresis resistance both electrically coupled in series to the first positive input, wherein the first hysteresis resistance is configured to be controlled, at least in part, by an output of the first amplifier; and

a first word line driving circuit configured to provide a first word line disable voltage based on the output of the first amplifier, wherein the first word line disable voltage is configured to drive a word line.

17. The system of claim 16 , further comprising:

a second temperature-sensing circuit including:

a second amplifier including a second positive input and a second negative input, wherein the second negative input is configured to be driven by the temperature-independent signal;

a second transistor electrically coupled to the second positive input, wherein the second transistor is configured to be controlled by the temperature signal; and

a second temperature threshold resistance and a second hysteresis resistance both electrically coupled in series to the second positive input, wherein the second hysteresis resistance is configured to be controlled, at least in part, by an output of the second amplifier; and

a second word line driving circuit configured to provide a second word line disable voltage based on the output of the second amplifier, wherein the second word line disable voltage is configured to drive the word line.

18. The system of claim 16 , wherein the first word line driving circuit is further configured to drive at least one of a dynamic random access memory (DRAM) device, a static random access memory (SRAM) device, or a random access memory (RAM) device.

19. The system of claim 16 , wherein the first temperature threshold resistance and the first hysteresis resistance are both configured to be programmable.

20. The system of claim 16 , wherein the temperature-independent signal is configured to be provided by a band gap reference signal.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 23, 2019
From: INTELLECTUAL VENTURES ASSETS
To: SAMSUNG ELECTRONCS CO., LTD.
Reel/Frame 049266/0532 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 14, 2019
From: NYTELL SOFTWARE LLC
To: INTELLECTUAL VENTURES ASSETS 124 LLC
Reel/Frame 049167/0319 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 22, 2019
From: WALKER, DARRYL G.
To: AGERSONN RALL GROUP, L.L.C.
Reel/Frame 048678/0131 →
MERGER Recorded Dec 31, 2015
From: INTELLECTUAL VENTURES HOLDING 83 LLC
To: NYTELL SOFTWARE LLC
Reel/Frame 037391/0741 →
CHANGE OF NAME Recorded Sep 30, 2011
From: AGERSONN RALL GROUP, L.L.C.
To: INTELLECTUAL VENTURES HOLDING 83 LLC
Reel/Frame 027016/0544 →