IP Library Granted Patent US 8,486,765
Granted Patent B2
US 8,486,765 · App. 13/238,975 · Granted Jul 16, 2013

Structure and process for electrical interconnect and thermal management

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Quick Facts
Patent No.
US 8,486,765
App. No.
13/238,975
Granted
Jul 16, 2013
Kind
B2
Abstract

A method for making a structure for thermal management of circuit devices. The method provides a first substrate and a second substrate where at least one of the first and second substrates includes a circuit element. The method forms in at least one of the first substrate and the second substrate an entrance through-hole extending through a thickness of the first substrate or the second substrate, forms in at least one of the first substrate and the second substrate an exit through-hole extending through a thickness of the first substrate or the second substrate, forms respective bonding elements on at least one of the first and second substrates, and bonds the first and second substrates at the respective bonding elements to form a seal between the first and second substrates and to form a first coolant channel in between the first and second substrates.

Claims (24)

1. A method for making a structure for thermal management of circuit devices, comprising:

providing a first substrate and a second substrate, wherein at least one of the first and second substrates includes a circuit element;

forming in at least one of the first substrate and the second substrate an entrance through-hole extending through a thickness of the first substrate or the second substrate;

forming in at least one of the first substrate and the second substrate an exit through-hole extending through a thickness of the first substrate or the second substrate;

forming respective bonding elements on at least one of the first and second substrates; and

bonding the first and second substrates at the respective bonding elements to form a seal between the first and second substrates and to form a first coolant channel extending laterally between the first and second substrates and separating the first and second substrates principally by a thickness of the bonding elements.

2. The method of claim 1 , wherein forming respective bonding elements comprises:

forming metallic bonding elements on the first and second substrates.

3. The method of claim 1 , wherein at least one of forming the entrance through-hole and forming the exit through-hole comprises:

forming a metallic conduit for connection to the circuit element.

4. The method of claim 3 , wherein at least one of forming the entrance through-hole and forming the exit through-hole comprises:

forming an electrical isolation region surrounding the metallic conduit.

5. The method of claim 3 , wherein forming a metallic conduit comprises:

forming said metal conduit with a flange.

6. The method of claim 5 , further comprising:

forming a metallic interconnect extending through said thickness of the first or the second substrate to form an electrical connection to the circuit element.

7. The method of claim 6 , further comprising:

upon said bonding, connecting the flange to the metallic interconnect.

8. The method of claim 6 , wherein forming a metallic interconnect comprises:

forming the metallic interconnect as a part of the entrance through-hole or the exit through-hole.

9. The method of claim 6 , wherein forming a metallic interconnect comprises:

isolating the metallic interconnect from an interior of the through-hole using an electrical insulator.

10. The method of claim 1 , wherein forming respective metallic bonding elements comprises:

forming an undulating path extending laterally between the first and second substrates for the first coolant channel between the first and second substrates.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2020
From: RESEARCH TRIANGLE INSTITUTE
To: MICROSS ADVANCED INTERCONNECT TECHNOLOGY, LLC
Reel/Frame 052133/0362 →
SECURITY AGREEMENT Recorded Feb 6, 2020
From: MICROSS ADVANCED INTERCONNECT TECHNOLOGY LLC; SILICON TURNKEY SOLUTIONS, INC.
To: ALLY BANK, AS ASSIGNEE
Reel/Frame 051836/0697 →
RELEASE OF SECURITY INTEREST Recorded Feb 6, 2020
From: MIDCAP FINANCIAL TRUST
To: MICROSS ADVANCED INTERCONNECT TECHNOLOGY LLC
Reel/Frame 051834/0394 →
RELEASE OF SECURITY INTEREST Recorded Aug 7, 2017
From: ALLY BANK
To: MICROSS ADVANCED INTERCONNECT TECHNOLOGY LLC
Reel/Frame 043479/0071 →
SECURITY INTEREST Recorded Aug 7, 2017
From: MICROSS ADVANCED INTERCONNECT TECHNOLOGY LLC
To: MIDCAP FINANCIAL TRUST
Reel/Frame 043476/0302 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 18, 2016
From: RESEARCH TRIANGLE INSTITUTE
To: MICROSS ADVANCED INTERCONNECT TECHNOLOGY LLC
Reel/Frame 040387/0745 →
GRANT OF SECURITY INTEREST IN PATENTS Recorded Oct 5, 2016
From: MICROSS ADVANCED INTERCONNECT TECHNOLOGY LLC
To: ALLY BANK
Reel/Frame 040229/0512 →