IP Library Granted Patent US 8,450,837
Granted Patent B2
US 8,450,837 · App. 13/240,870 · Granted May 28, 2013

Circuit device having an improved heat dissipitation, and the method of manufacturing the same

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Quick Facts
Patent No.
US 8,450,837
App. No.
13/240,870
Granted
May 28, 2013
Kind
B2
Abstract

In a hybrid integrated circuit device, a circuit board on which an island portion of a lead is fixedly attached and a control board on which a control element and the like are mounted are disposed in an overlapping manner. The circuit board and the control board are integrally encapsulated with an encapsulating resin. A transistor disposed on an upper surface of the circuit board and a control element mounted on an upper surface of the control board are also covered by the encapsulating resin. Thus, a module in which an inverter circuit and a control circuit are integrally encapsulated with resin is provided.

Claims (32)

1. A circuit device comprising:

a first substrate;

a lead comprising a lead portion, a bonding portion and an island portion, the island portion being attached to an upper surface of the first substrate;

a first circuit element mounted on the island portion of the lead;

a second substrate disposed above and overlapping the first substrate;

a second circuit element mounted on the second substrate so as to be electrically connected to the first circuit element through the lead; and

an encapsulating resin covering the first substrate, the second substrate, the first circuit element, the second circuit element, the bonding portion and the island portion, the lead portion of the lead not being covered by the encapsulating resin, wherein

the bonding portion is elevated from a surface of the island portion, and is connected to a wiring that is connected to the first circuit element.

2. The circuit device of claim 1 , wherein a lower surface of the first substrate is not covered by the encapsulating resin so as to be exposed to an outside ambience.

3. The circuit device of claim 1 , wherein the first circuit elements is a transistor for an inverter circuit, and the second circuit element is a control element that controls switching of the transistors.

4. A circuit device comprising:

a first substrate having a first side and a second side;

a plurality of first leads disposed along the first side of the first substrate and each comprising a lead portion and an island portion which is attached to an upper surface of the first substrate;

a plurality of first circuit elements mounted on the island portions of the first leads;

a second substrate disposed above and overlapping the first substrate;

a plurality of second leads disposed along the second side of the first substrate;

a plurality of second circuit elements mounted on the second substrate so as to be electrically connected to corresponding first circuit elements through the second leads; and

an encapsulating resin covering the first substrate, the second substrate, the first circuit elements, the second circuit elements and the island portions, the lead portions of the first leads not being covered by the encapsulating resin.

5. The circuit device of claim 4 , wherein at least one of the first leads comprises a first bonding portion disposed between the lead portion and the island portion, the first bonding portion being elevated from a main surface of the first substrate and being electrically connected to a corresponding first circuit element through a wiring.

6. The circuit device of claim 4 , wherein an inner end of at least one of the second leads is separated into a second bonding portion electrically connected to a corresponding first circuit element and a supporting portion that supports the second substrate.

7. The circuit device of claim 6 , wherein the second bonding portion is disposed away from the main surface of the first substrate.

8. The circuit device of claim 5 , wherein a first circuit element is electrically connected to a first bonding portion of another of the first leads through a wiring.

9. The circuit device of claim 4 , wherein a lower surface of the first substrate is not covered by the encapsulating resin so as to be exposed to an outside ambience.

10. The circuit device of claim 4 , wherein some of the first circuit elements are transistors for an inverter circuit, and some of the second circuit elements are control elements that control switching of the transistors.

11. A method of manufacturing a circuit device, comprising:

providing a lead frame comprising a plurality of leads, some of the leads comprising respective island portions and bonding portions;

mounting a first circuit element on an upper surface of each of the island portions;

attaching lower surfaces of the island portions to an upper surface of a first substrate;

placing a second substrate on which second circuit elements are mounted over the first substrate so that the second substrate is mechanically supported by the leads; and

encapsulating the first substrate, the first circuit elements, the second substrate and the second circuit elements by a resin, wherein

the bonding portion of a lead is elevated from a surface of the corresponding island portion, and is connected to a wiring that is connected to the first circuit element.

12. The method of claim 9 , wherein some portions of leads are not covered by the resin, the first circuit elements are electrically connected to another portions of the leads through wirings, and the another portions of the leads are elevated from the island portions.

Assignments (6)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2014
From: ON SEMICONDUCTOR TRADING SARL
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 033626/0753 →
CHANGE OF NAME Recorded Aug 22, 2014
From: ON SEMICONDUCTOR TRADING, LTD.
To: ON SEMICONDUCTOR TRADING SARL
Reel/Frame 033596/0245 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 18, 2011
From: MASHIMO, SHIGEKI; HORIUCHI, FUMIO; KUDO, KIYOAKI; SAKURAI, AKIRA; INAGAKI, YUHKI
To: ON SEMICONDUCTOR TRADING, LTD.
Reel/Frame 027078/0535 →