IP Library Granted Patent US 8,595,604
Granted Patent B2
US 8,595,604 · App. 13/247,439 · Granted Nov 26, 2013

Methods and apparatus for search sphere linear block decoding

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Quick Facts
Patent No.
US 8,595,604
App. No.
13/247,439
Granted
Nov 26, 2013
Kind
B2
Abstract

A search sphere-based linear block decoder is provided. A received vector, v, is decoded by computing a syndrome vector, S, corresponding to the received vector, v; (S=vH); obtaining a set of all possible error vectors, e, corresponding to the computed syndrome vector, S, wherein the set of all possible error vectors, e, is obtained from a pre-computed error table and has a specified maximum number of bit errors; calculating a set of all possible received vectors, x, based on the received vector, v, and the set of all possible error vectors, e; determining a k-bit code-vector x that is closest to the received vector, v; and determining an n-bit data-vector, d, associated with the k-bit code-vector x. The pre-computed error table can be generated by multiplying all possible error vectors by a Syndrome Matrix, to obtain all possible syndrome vectors associated with all possible error vectors.

Claims (52)

1. A method for decoding a received vector, v, comprising:

obtaining said received vector, v;

computing a syndrome vector, S, corresponding to said received vector, v;

S=vH

obtaining a set of all possible error vectors, e, corresponding to said computed syndrome vector, S, wherein said set of all possible error vectors, e, is obtained from a pre-computed error table and has a specified maximum number of bit errors;

calculating a set of all possible received vectors, x, based on said received vector, v, and said set of all possible error vectors, e,

determining a k-bit code-vector x that is closest to said received vector, v; and

determining an n-bit data-vector, d, associated with the k-bit code-vector x.

2. The method of claim 1 , wherein said computing step computes said syndrome vector S, as follows:

S=vH

where H is a parity check matrix.

3. The method of claim 1 , wherein said pre-computed error table is generated by multiplying all possible error vectors by a Syndrome Matrix, to obtain all possible syndrome vectors associated with all possible error vectors.

4. The method of claim 3 , wherein said pre-computed error table provides a search sphere of possible error vectors around said received vector.

5. The method of claim 1 , wherein said step of determining said k-bit code-vector x that is closest to said received vector, v, applies a maximum likelihood criterion.

6. The method of claim 1 , wherein said set of all possible received vectors, x, is calculated as follows:

x=XOR ( v,e ).

7. The method of claim 1 , wherein said determined k-bit code-vector x is closest in a Euclidian sense to said received vector, v.

8. A linear block decoder, comprising:

a memory; and

at least one hardware device, coupled to the memory, operative to:

obtain said received vector, v;

compute a syndrome vector, S, corresponding to said received vector, v;

S=vH

obtain a set of all possible error vectors, e, corresponding to said computed syndrome vector, S, wherein said set of all possible error vectors, e, is obtained from a pre-computed error table and has a specified maximum number of bit errors;

calculate a set of all possible received vectors, x, based on said received vector, v, and said set of all possible error vectors, e,

determine a k-bit code-vector x that is closest to said received vector, v; and

determine an n-bit data-vector, d, associated with the k-bit code-vector x.

9. The linear block decoder of claim 8 , wherein said syndrome vector S, is computed as follows:

S=vH

where H is a parity check matrix.

10. The linear block decoder of claim 8 , wherein said pre-computed error table is generated by multiplying all possible error vectors by a Syndrome Matrix, to obtain all possible syndrome vectors associated with all possible error vectors.

11. The linear block decoder of claim 10 , wherein said pre-computed error table provides a search sphere of possible error vectors around said received vector.

12. The linear block decoder of claim 8 , wherein said k-bit code-vector x that is closest to said received vector, v, is determined by applying a maximum likelihood criterion.

13. The linear block decoder of claim 8 , wherein said set of all possible received vectors, x, is calculated as follows:

x=XOR ( v,e ).

14. The linear block decoder of claim 8 , wherein said determined k-bit code-vector x is closest in a Euclidian sense to said received vector, v.

15. An article of manufacture for decoding a received vector, v, comprising a tangible machine readable recordable medium containing one or more programs which when executed implement the steps of:

obtaining said received vector, v;

computing a syndrome vector, S, corresponding to said received vector, v;

S=vH

obtaining a set of all possible error vectors, e, corresponding to said computed syndrome vector, S, wherein said set of all possible error vectors, e, is obtained from a pre-computed error table and has a specified maximum number of bit errors;

calculating a set of all possible received vectors, x, based on said received vector, v, and said set of all possible error vectors, e,

determining a k-bit code-vector x that is closest to said received vector, v; and

determining an n-bit data-vector, d, associated with the k-bit code-vector x.

16. The article of manufacture of claim 15 , wherein said computing step computes said syndrome vector S, as follows:

S=vH

where H is a parity check matrix.

17. The article of manufacture of claim 15 , wherein said pre-computed error table is generated by multiplying all possible error vectors by a Syndrome Matrix, to obtain all possible syndrome vectors associated with all possible error vectors.

18. The article of manufacture of claim 17 , wherein said pre-computed error table provides a search sphere of possible error vectors around said received vector.

19. The article of manufacture of claim 15 , wherein said step of determining said k-bit code-vector x that is closest to said received vector, v, applies a maximum likelihood criterion.

20. The article of manufacture of claim 15 , wherein said set of all possible received vectors, x, is calculated as follows:

x=XOR ( v,e ).

Assignments (4)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS AT REEL/FRAME NO. 32856/0031 Recorded May 29, 2015
From: DEUTSCHE BANK AG NEW YORK BRANCH
To: LSI CORPORATION
Reel/Frame 035797/0943 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2015
From: LSI CORPORATION
To: INTEL CORPORATION
Reel/Frame 035090/0477 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →