IP Library Granted Patent US 8,533,544
Granted Patent B2
US 8,533,544 · App. 13/257,334 · Granted Sep 10, 2013

System for tree sequence testing of a device and method for tree sequence testing of a device in a test framework architecture

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Quick Facts
Patent No.
US 8,533,544
App. No.
13/257,334
Granted
Sep 10, 2013
Kind
B2
Abstract

A system comprises a test framework architecture for tree sequence testing of a device, comprising a plurality of hierarchical layers at least comprising an upmost layer and a lowest layer, each layer of the plurality of hierarchical layers comprising at least one of a plurality of test sequences, each test sequence comprising a plurality of test steps, each test step comprising a current layer information; a test action information for carrying out a test action on the device; and a recovery information for carrying out a recovery action on reception of a recovery call from a next lower layer.

Claims (45)

1. A system for tree sequence testing of a device, comprising:

a current layer memory unit storing current layer information describing a current layer;

a test action memory unit storing test action instructions executable by a test module for a test action to be carried out on said device; and

a recovery memory unit storing recovery instructions executable by said test module, for a recovery action to be carried out on reception of a recovery call from a next lower layer with respect to the current layer, wherein

said system is arranged to execute a multiple of test sequences in a hierarchical order defined by a test framework architecture,

the test framework architecture comprises a plurality of hierarchical layers at least comprising an upmost layer and a lowest layer,

each layer of said plurality of hierarchical layers comprises at least one test sequence, and each test sequence comprising a plurality of test steps comprising:

executing on said device, in accordance with said test action instructions, said test action associated with said current layer,

executing a recovery action in accordance with said recovery instructions on reception of a recovery call from a next lower layer with respect to the current layer, and

transmitting a recovery call to a next upper layer with respect to the current layer when said test action fails.

2. The system as claimed in claim 1 , wherein said recovery call from said next lower layer is generated when a test action of a test step of a test sequence of said next lower layer fails.

3. The system as claimed in claim 1 , wherein recovery calls are recursively generated from each next lower level until a recovery action of a test step of a test sequence of a current layer succeeds.

4. The system as claimed in claim 1 , wherein said recovery call is passed on to a next upper layer, when a test action failure classification indicates that a recovery action will not be successful for a current layer.

5. The system as claimed in claim 1 , wherein a test action of a current test step is carried out on reception of a test call generated by a next upper layer test step when a test action of said next upper layer test step succeeds.

6. The system as claimed in claim 1 , wherein a test action of a current test step is carried out on reception of a test call

generated by one of a previous test step of the same current test sequence of the same current layer, preceding said current test step or

a previous test step of a different test sequence of the same current layer, when said previous test step of said different test sequence finishes said different test sequence.

7. The system as claimed in claim 1 , wherein a test action of a current test step is carried out on reception of a test call generated by a next lower layer test step when a test action of said next lower layer test step succeeds and said next lower layer test step finishes a test sequence in said next lower layer.

8. The system as claimed in claim 1 , comprising a memory for saving a test context for at least one of said layers.

9. The system as claimed in claim 1 , comprising a representation unit for managing tests and evaluating test results of at least one of said plurality of test sequences.

10. A method for tree sequence testing of a device in a test framework architecture, comprising:

executing a plurality of test steps in a hierarchical layer order defined by a plurality of hierarchical layers at least comprising an upmost layer and a lowest layer; and

each of said plurality of hierarchical layers comprises at least one test sequence of at least two test steps comprising:

carrying out a test action on said device,

transmitting a recovery call to a next upper layer when said test action fails, and

executing a recovery action on reception of a recovery call from a next lower layer.

11. The method as claimed in claim 10 , wherein said executing a recovery action by a next upper layer when a test action fails comprises recursively repeating said step until said recovery action succeeds.

12. The method as claimed in claim 10 , wherein the step of executing a recovery action by a next upper layer when a test action fails comprises recursively passing on said recovery call to a next upper layer, when a failure classification indicates that a recovery action will not be successful for the current layer.

13. The method as claimed in claim 10 further comprising:

receiving a test call generated by a test step executed by a next upper layer; and

performing said test action on said device if the test call indicates that the test step executed by the next upper level succeeded.

14. The method as claimed in claim 10 further comprising:

receiving a test call, wherein the test call is generated by one of

a previous test step of a current test sequence of the same hierarchical layer, and

a previous test step of a different test sequence of the same hierarchical layer when said previous test step finishes said different test sequence.

15. The method as claimed in claim 10 further comprising:

receiving a test call generated by a next lower hierarchical layer test step; and

performing said test action if the test call indicates that a test action of the next lower hierarchical layer succeeds and said next lower hierarchical layer test step finishes a test sequence in said next lower hierarchical layer.

16. The method as claimed in claim 10 further comprising storing a test context for at least one of the plurality of hierarchical layers.

17. A non-transitory computer readable storage medium storing instructions executable by a processor, the instructions configured to:

execute a plurality of test steps in a hierarchical layer order defined by a plurality of hierarchical layers, wherein the plurality of hierarchical layers comprises at least an upmost layer and a lowest layer; and

each of said plurality of hierarchical layers comprises instructions for at least one test sequence of at least two test steps comprising instructions configured to:

carry out a test action on said device,

transmit a recovery call to a next upper layer when said test action fails, and

execute a recovery action on reception of a recovery call from a next lower layer.

Assignments (31)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 044209/0047 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0334 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0285 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0387 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027622/0477 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027622/0075 →
SECURITY AGREEMENT Recorded Jan 31, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027621/0928 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 19, 2011
From: TEPUS, CRISTIAN
To: FREESCALE SEMICONDUCTOR INC
Reel/Frame 026925/0152 →