Data processing system with safe call and return
View Patent ↗Embodiments of a system and method are disclosed that can include a memory unit, and a memory management unit coupled to the memory unit. The memory management unit can include address mapping circuitry and access control circuitry operable to: provide address mappings for at least a frame stack and a link stack in the memory unit for programs being executed by the processing unit, and provide an access permission indicator applicable to any segment of the memory unit. A processing unit can save context information for a program to the frame stack, and execute a savelink instruction subsequent to the execution of a branch and link instruction. If the access permission indicator is set, the savelink instruction saves to the link stack a return address provided by the branch and link instruction.
1. A method comprising:
in a system including a register file:
allocating a link stack memory segment for storing a link stack;
executing a branch and link instruction in which a program counter (PC) value is stored to the register file;
executing a savelink instruction in which a link stack pointer value to the link stack memory segment is incremented; and
if page attributes corresponding to the link stack memory segment having a memory location pointed to by the incremented link stack pointer has a stack attribute set, storing the PC value from the register file in the link stack memory segment.
2. The method of claim 1 further comprising:
if page attributes corresponding to the link stack memory segment pointed to by the incremented link stack pointer has the stack attribute cleared, generating a link stack access exception.
3. The method of claim 2 further comprising:
if the link stack access exception was not generated:
saving a previous frame pointer;
setting up a new frame;
incrementing a frame pointer;
executing processing instructions indicated by the branch and link instruction; and
restoring the previous frame pointer.
4. The method of claim 1 further comprising:
executing a getlink instruction in which:
if the page attributes corresponding to the link stack memory segment having the memory location pointed to by the link stack pointer value has the stack attribute set, the stored PC value from the link stack is loaded as the return address and the incremented link stack pointer value is decremented.
5. The method of claim 4 further comprising:
if page attributes corresponding to the link stack memory segment pointed to by the link stack pointer has the stack attribute cleared, generating a link stack access exception.
6. The method of claim 5 further comprising:
if the link stack access exception is not generated, incrementing a return address and continuing program execution at the incremented return address.
7. A system comprising:
a memory unit;
a memory management unit coupled to the memory unit, wherein the memory management unit includes address mapping circuitry and access control circuitry operable to:
provide address mappings for at least a frame stack and a link stack in the memory unit for programs being executed by the processing unit, and
provide an access permission indicator applicable to any segment of the memory unit; and
a processing unit operable to:
save context information for a program to the frame stack, and
execute a savelink instruction subsequent to the execution of a branch and link instruction, wherein if the access permission indicator is set, the savelink instruction saves to the link stack a return address provided by the branch and link instruction; and
execute a getlink instruction that restores from the link stack the return address to the program that invoked the branch and link instruction, wherein memory segments which have the access permission indicator set can only be accessed using the savelink and getlink instructions.
8. The system of claim 1 further comprising:
memory segments which do not have the access permission indicator set cannot be accessed using the savelink and getlink instructions.
9. The system of claim 1 further comprising:
the savelink instruction increments a link stack pointer;
if a page address entry corresponding to the link stack pointed to by an incremented link stack pointer has the access permission indicator cleared, the processing unit generates a link stack access exception.
10. The system of claim 9 further comprising:
if the link stack access exception was not generated, the processing unit:
saves a previous frame pointer,
sets up a new frame,
increments a frame pointer,
executes processing instructions indicated by the branch and link instruction, and
restores the previous frame pointer.
11. The system of claim 9 wherein the processing unit is further operable to:
execute a getlink instruction that restores from the link stack the return address to the program that invoked the branch and link instruction;
if the page address entry corresponding to the link stack having a memory location pointed to by the link stack pointer has the access permission indicator set, the getlink instruction loads the stored program counter value from the link stack as the return address and decrements the incremented link stack pointer.
12. The system of claim 11 further comprising:
if the page address entry corresponding to the link stack pointed to by the link stack pointer has the access permission indicator cleared, the savelink instruction generates the link stack access exception.
13. The system of claim 12 wherein the processing unit is further operable to:
if the link stack access exception is not generated, the getlink instruction increments a return address and the processing unit continues program execution at the incremented return address.
14. A system comprising:
a memory unit;
a memory management unit coupled to the memory unit, wherein the memory management unit includes address mapping circuitry and access control circuitry operable to:
provide address mappings for at least a frame stack and a link stack in the memory unit for programs being executed by the processing unit, and
wherein a mapping provides a stack segment attribute indicator applicable to any segment of the memory unit; and
a processing unit operable to:
save a first portion of context information for a program to the link stack if the stack segment attribute indicator is set,
save a second portion of the context information, not overlapping the first portion of the context information, to the frame stack, and
save a value of a link stack pointer to the frame stack.
15. The system of claim 14 further comprising:
if a page address entry corresponding to a link stack memory segment pointed to by the link stack pointer has the stack segment attribute indicator cleared, the processor generates a link stack access exception.
16. The system of claim 15 further comprising:
if the link stack access exception was not generated, the processing unit:
saves a previous frame pointer;
sets up a new frame;
increments the frame pointer;
executes instructions to which program execution was transferred; and
upon encountering instructions requesting a transfer to a prior context, restores the requested context.
17. The system of claim 14 wherein the processing unit is further operable to:
if a page address entry corresponding to the link stack having a memory location pointed to by a link stack pointer value has the stack segment attribute set, a stored value from the link stack is loaded as a return address and an incremented link stack pointer value is decremented.
18. The system of claim 17 further comprising:
if a page address entry corresponding to the link stack pointed to by the link stack pointer has the stack segment attribute cleared, the processing unit is further operable to generate a link stack access exception.
19. The system of claim 14 wherein the first portion of the context information includes values of at least a frame pointer and one register value.
20. The system of claim 19 wherein the first portion of the context information includes key context information.