Patent Assignment
Reel/Frame 037357/0439
Patent Release
Recorded: 2015-12-21
Pages: 8
Assignor
CITIBANK, N.A., AS COLLATERAL AGENT
Executed: 2015-12-07
Assignee
FREESCALE SEMICONDUCTOR, INC.
6501 WILLIAM CANNON DRIVE WEST, AUSTIN, TEXAS, 78735
Covered Properties
(72)
Rotary Disk Gyroscope
Method for Power Reduction and a Device Having Power Reduction Capabilities
Stacked Semiconductor Die with Continuous Conductive Vias
Stacked Semiconductor Devices
Circuit to Reduce Peak Power During Transition Fault Testing of Integrated Circuit
Heterogeneous Multi-Core Integrated Circuit and Method for Debugging Same
Three-Dimensional Solar Cell Having Increased Efficiency
Integrated Circuit Having Latch-Up Recovery Circuit
Multiple Core Data Processor with Usage Monitoring
Application:
13/272,725 →
Publication:
US US20120036398A1
Substrate Bonding with Metal Germanium Silicon Material
Semiconductor Device and Method of Making
A Digital Logic Controller for Regulating Voltage of a System on Chip
Gan-On-Si Switch Devices
Low Loss Substrate for Integrated Passive Devices
Semiconductor Structure Having a Through Substrate via (Tsv) and Method for Forming
Method of Making a Non-Volatile Memory Cell Having a Floating Gate
Application:
13/279,807 →
Publication:
US US20130102143A1
Inertial Sensor with Off-Axis Spring System
Transistors with Different Threshold Voltages
Systems and Methods for Semaphore-Based Protection of Shared System Resources
Application:
13/283,187 →
Publication:
US US20130111168A1
Transmit Power Control Techniques for Nodes in an Ad-Hoc Network
High Side Driver Circuit
Semiconductor Device with Vias on a Bridge Connecting Two Buses
Data Processing System with Safe Call and Return
Methods of Forming Laterally Diffused Metal Oxide Semiconductor Transistors for Radio Frequency Power Amplifiers
Built-In Self Trim for Non-Volatile Memory Reference Current
Clock Frequency Overshoot Detection Circuit
Scan Testing of Integrated Circuit with Clock Gating Cells
Application:
13/288,037 →
Publication:
US US20130117618A1
Testing a Switched Mode Supply with Waveform Generator and Capture Channel
Device and Method for Evaluating a Temperature
Method of Packaging Semiconductor Die
Semiconductor Sensor Device with Over-Molded Lid
Pressure Sensor and Method of Packaging Same
Insulated Gate Field Effect Transistors
Memory and Method for Sensing Data in a Memory Using Complementary Sensing Scheme
Semiconductor Device Packaging Having Substrate with Pre-Encapsulation Through via Formation
Method and Apparatus to Improve Reliability of Vias
Method of Sealing an Air Gap in a Layer of a Semiconductor Structure and Semiconductor Structure
Semiconductor Sensor Device with Footed Lid
Methods and Apparatus to Improve Reliability of Isolated Vias
Low Leakage Current Operation of Integrated Circuit Using Scan Chain
Multi-Core Decompression of Block Coded Video Data
Message Passing Using Direct Memory Access Unit in a Data Processing System
Computer Systems and Methods for Register-Based Message Passing
Application:
13/307,303 →
Publication:
US US20130138930A1
Semiconductor Device with Self-Biased Isolation
Packaged Die for Heat Dissipation and Method Therefor
Logic and Non-Volatile Memory (Nvm) Integration
Methods and Apparatus for Testing Multiple-Ic Devices
Method of Protecting Against via Failure and Structure Therefor
Semiconductor Device with Photonics
Method of Forming a Semiconductor Device and Semiconductor Device
Integrated Circuit and Integrated Circuit Package
Integrated Circuit Comprising Trace Logic and Method for Providing Trace Information
Child Car Seat for a Land Vehicle
Touch-Screen Interface Circuit
Method of Forming an Electromechanical Transducer Device
Multichannel Receiver System and Method for Multichannel Receiver Monitoring
Integrated Circuit with Channel Estimation Module and Method Therefor
Customized Shield Plate for a Field Effect Transistor
Semiconductor Device Packaging Using Encapsulated Conductive Balls for Package-on-Package Back Side Coupling
Application:
13/325,092 →
Publication:
US US20130154091A1
Touch Sense Interface Circuit
Reconfigurable Engineering Change Order Base Cell
Patent:
8,446,176 →
Application:
13/326,556 →
Packaged Leadless Semiconductor Device
Configurable Flip-Flop
Mram Device and Method of Assembling Same
Application:
13/333,996 →
Publication:
US US20120193737A1
Mram Device and Method of Assembling Same
Planar Inverted-F Antennas, and Modules and Systems in Which They Are Incorporated
Extendable-Arm Antennas, and Modules and Systems in Which They Are Incorporated
Battery Charging Circuit and Electronic Device
Device for Forming a High-Resolution Image, Imaging System, and Method for Deriving a High-Spatial-Resolution Image
Integrated Circuit, Communication Unit and Method for Phase Adjustment
Degree-Of-Focus Determination Module, Position-of-Best-Focus Selection Modules, Image Processing Module, Imaging System, and Corresponding Method
Integrated Circuit Comprising Voltage Modulation Circuitry and Method Therefor
Related Assignments
(25)
Other recorded transfers of the patents in this record — the chain of ownership.
Supplement to Ip Security Agreement
Mar 7, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027821/0982 →
Supplement to Ip Security Agreement
Mar 7, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027821/0662 →
Supplement to Ip Security Agreement
Mar 7, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027821/0967 →
Security Agreement
Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
Patent Release
Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0447 →
Patent Release
Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0379 →
Assignment and Assumption of Security Interest in Patents
Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
Assignment and Assumption of Security Interest in Patents
Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
Assignment of Assignor's Interest
Feb 4, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NORTH STAR INNOVATIONS INC.
Reel/Frame 037694/0264 →
Security Agreement Supplement
Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
Supplement to the Security Agreement
Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
Corrective Assignment to Correct the Remove Application 12092129 Previously Recorded on Reel 038017 Frame 0058. Assignor(S) Hereby Confirms the Security Agreement Supplement.
Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
Patent Release
Aug 17, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 039707/0471 →
Release of Security Interest
Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
Release of Security Interest
Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
Change of Name
Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
Merger
Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040652/0241 →
Change of Name
Nov 16, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040626/0683 →
Merger
Jan 3, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041144/0363 →
Corrective Assignment to Correct the Nature of Conveyance Previously Recorded at Reel: 040652 Frame: 0241. Assignor(S) Hereby Confirms the Merger and Change of Name.
Jan 5, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041260/0850 →
Corrective Assignment to Correct the Nature of Conveyance Previously Recorded at Reel: 040626 Frame: 0683. Assignor(S) Hereby Confirms the Merger and Change of Name Effective November 7, 2016.
Jan 12, 2017
From: NXP SEMICONDUCTORS USA, INC. (MERGED INTO); FREESCALE SEMICONDUCTOR, INC. (UNDER)
To: NXP USA, INC.
Reel/Frame 041414/0883 →
Corrective Assignment to Correct the Remove Patents 8108266 and 8062324 and Replace Them with 6108266 and 8060324 Previously Recorded on Reel 037518 Frame 0292. Assignor(S) Hereby Confirms the Assignment and Assumption of Security Interest in Patents.
Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
Assignment of Assignor's Interest
Feb 15, 2017
From: NORTH STAR INNOVATIONS INC.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 041717/0736 →
Corrective Assignment to Correct the Remove Application 12681366 Previously Recorded on Reel 038017 Frame 0058. Assignor(S) Hereby Confirms the Security Agreement Supplement.
May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
Corrective Assignment to Correct the Remove Application 12681366 Previously Recorded on Reel 039361 Frame 0212. Assignor(S) Hereby Confirms the Security Agreement Supplement.
May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →