IP Library Granted Patent US 8,264,060
Granted Patent B2
US 8,264,060 · App. 13/300,953 · Granted Sep 11, 2012

Method of sealing an air gap in a layer of a semiconductor structure and semiconductor structure

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,264,060
App. No.
13/300,953
Granted
Sep 11, 2012
Kind
B2
Abstract

Providing a first layer of a semiconductor structure having at least one air gap between conductive lines formed in the first layer. The air gap extends into the first layer from a first surface of the first layer. A barrier dielectric material over the first surface and the air gap is selected to have a dielectric constant less than 3.5 and to provide a barrier to prevent chemicals entering the at least one air gap. An air gap can extend from a first surface of the first layer to at least a portion of side surfaces of the at least two conductive lines to expose at least a portion of the side surfaces.

Claims (65)

1. A semiconductor device structure comprising:

a first layer having at least one air gap for providing isolation between at least two conductive lines formed in the first layer, the at least one air gap extending into the first layer from a first surface of the first layer;

a first dielectric layer over the first surface of the first layer, the first dielectric layer closes the at least one air gap;

a barrier layer of a first barrier dielectric material over the first dielectric layer that is conformal, the barrier layer having a thickness in the range of 1-10 nm, a dielectric constant less than 3.5, and is a barrier that prevents chemicals entering the at least one air gap; and

a second dielectric layer over the barrier layer having at least one air gap for providing isolation between at least two conductive lines formed in the second dielectric layer.

2. The structure of claim 1 , wherein the first barrier dielectric material is a non-porous material.

3. The structure of claim 1 , wherein the first barrier dielectric material is one of the following:

fluorine doped silicon dioxide;

carbon doped silicon dioxide;

organic polymeric dielectrics;

parylene;

amorphous carbon;

hydrogenated carbon (a-H:C);

fluorinated amorphous carbon (a-F:C)n.

4. The structure of claim 1 , wherein the at least one air gap of the first layer extends to the at least two conductive lines to expose surfaces of the at least two conductive lines formed in the first layer, the structure further comprising a second barrier layer of a second barrier dielectric material over the exposed surfaces of each of the at least two conductive lines.

5. The structure of claim 4 , wherein the second barrier dielectric material has a dielectric constant less than 3.5 and provides a barrier to prevent chemicals contacting the at least two conductive lines.

6. The structure of claim 4 , wherein the second barrier dielectric material is a non-porous material.

7. The structure of claim 4 , wherein the second barrier layer has a thickness in the range of 1-10 nm.

8. A semiconductor device structure comprising:

a first layer having at least one air gap for providing isolation between at least two conductive lines formed in the first layer, the at least one air gap extending into the first layer from a first surface of the first layer, and extending to the at least two conductive lines to expose surfaces of the at least two conductive lines;

a first barrier layer of a first barrier dielectric material over the exposed surfaces of each of the at least two conductive lines;

a dielectric layer over the first surface of the first layer that closes the at least one air gap, the first barrier layer between the at least two conductive lines and the dielectric layer;

a second barrier layer of a second barrier dielectric material over the dielectric layer that is conformal to the dielectric layer, the second barrier layer having a thickness in the range of 1-10 nm, the second barrier dielectric material having a dielectric constant less than 3.5, wherein the second barrier dielectric material prevents chemicals entering the at least one air gap; and

wherein the first barrier dielectric material is one of the following:

fluorine doped silicon dioxide;

carbon doped silicon dioxide;

organic polymeric dielectrics;

parylene;

amorphous carbon;

hydrogenated carbon (a-H:C);

fluorinated amorphous carbon (a-F:C)n.

9. A semiconductor device structure comprising:

a first layer of the semiconductor device structure having at least one air gap that isolates at least two conductive lines formed in the first layer, the at least one air gap extending into the first layer from a first surface of the first layer, and extending to the at least two conductive lines to expose surfaces of the at least two conductive lines;

a first barrier layer of a first barrier dielectric material over the exposed surfaces of each of the at least two conductive lines;

a dielectric layer on the first surface of the first layer such that the dielectric layer closes the at least one air gap, the first barrier layer between the at least two conductive lines and the dielectric layer; and

a second barrier layer of a second barrier dielectric material over the dielectric layer that is conformal to the dielectric layer, the second barrier layer having a thickness in the range of 1-10 nm, the second barrier dielectric material being selected to have a dielectric constant less than 3.5 and to provide a barrier that prevents chemicals from entering the at least one air gap,

wherein the second barrier dielectric material and the first barrier dielectric material are the same.

10. The structure of claim 5 , wherein the first layer comprises:

a second dielectric layer having at the least two conductive lines formed in the first dielectric layer; and

the at least one air gap being in the second dielectric layer and extending from the first surface of the second dielectric layer into the second dielectric layer and extending to at least a portion of side surfaces of the at least two conductive lines to expose at least portions of the side surfaces, and

wherein the second barrier layer is conformal to the side surfaces of the at least two conductive lines through the at least one air gap.

11. The structure of claim 10 , wherein the at least one air gap is defined by exposed surfaces of the second dielectric layer extending from the first surface and wherein the second barrier layer is on the exposed surfaces of the first dielectric layer.

12. The structure of claim 10 , wherein each of the at least two conductive lines have a top surface which is substantially in the same plane as the first surface of the second dielectric layer, wherein a second barrier layer is over at least a portion of the top surfaces of at least one of the at least two conductive lines.

13. The structure of claim 1 , wherein the barrier dielectric material is one of the following:

fluorine doped silicon dioxide;

carbon doped silicon dioxide;

organic polymeric dielectrics;

parylene;

amorphous carbon;

hydrogenated carbon (a-H:C);

fluorinated amorphous carbon (a-F:C)n.

14. The structure of claim 1 , wherein the at least one air gap extends to the at least two conductive lines to expose surfaces of the at least two conductive lines, the structure further comprising a second barrier layer of a second barrier dielectric material over the exposed surfaces of each of the at least two conductive lines.

15. The structure of claim 5 , wherein the second barrier layer has a thickness in the range of 1-10 nm.

16. The structure of claim 1 , wherein the second barrier dielectric material is one of the following:

fluorine doped silicon dioxide;

carbon doped silicon dioxide;

organic polymeric dielectrics;

parylene;

amorphous carbon;

hydrogenated carbon (a-H:C);

fluorinated amorphous carbon (a-F:C)n.

17. The structure of claim 9 , wherein the first barrier dielectric material has a dielectric constant less than 3.5 and provides a barrier that prevents chemicals contacting the at least two conductive lines.

18. The structure of claim 9 , wherein the first barrier dielectric material is a non-porous material.

19. The structure of claim 9 , wherein the first barrier layer has a thickness in the range of 1-10 nm.

20. The structure of claim 8 , wherein the first barrier dielectric material has a dielectric constant less than 3.5 and provides a barrier that prevents chemicals contacting the at least two conductive lines.

Assignments (30)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 044209/0047 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0447 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0439 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0379 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Mar 7, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027821/0662 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Mar 7, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027821/0967 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Mar 7, 2012
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 027821/0982 →