LDMOS semiconductor device with parasitic bipolar transistor for reduced surge current
View Patent ↗An N type layer made of an N type epitaxial layer in which an N+ type drain layer etc are formed is surrounded by a P type drain isolation layer extending from the front surface of the N type epitaxial layer to an N+ type buried layer. A P type collector layer is formed in an N type layer made of the N type epitaxial layer surrounded by the P type drain isolation layer and a P type element isolation layer, extending from the front surface to the inside of the N type layer. A parasitic bipolar transistor that uses the first conductive type drain isolation layer as the emitter, the second conductive type N type layer as the base, and the collector layer as the collector is thus formed so as to flow a surge current into a ground line.
1. A semiconductor device comprising:
a semiconductor substrate of a first general conductivity type;
an epitaxial layer of a second general conductivity type formed on the semiconductor substrate;
a buried layer of the second general conductivity type formed in a boundary region between the semiconductor substrate and the epitaxial layer;
a drift layer of the second general conductivity type formed in a surface portion of the epitaxial layer;
an element isolation layer of the first general conductivity type formed in the epitaxial layer so as to surround the drift layer;
a drain layer of the second general conductivity type formed in a surface portion of the drift layer and connected to a drain electrode of the semiconductor device;
a drain isolation layer of the first general conductivity type formed in the epitaxial layer so as to surround the drift layer and the drain layer;
a hole collection layer of the first general conductivity type connected to a collector electrode of the semiconductor device and formed in a surface portion of the epitaxial layer that is between the drain isolation layer and the element isolation layer;
a guard ring layer of the second general conductivity type formed in a surface portion of the epitaxial layer so as to be in direct contact with and surrounding an upper portion of the hole collection layer at a surface of the epitaxial layer, wherein the hole collection layer extends into the epitaxial layer below the guard ring layer, the element isolation layer surrounding the epitaxial layer containing the guard ring layer;
a body layer of the first general conductivity type formed in a surface portion of the epitaxial layer;
a source layer of the second general conductivity type formed in a surface portion of the body layer;
a gate insulation film formed on a surface portion of the body layer; and
a gate electrode of the semiconductor device formed on the gate insulation film.
2. The semiconductor device of claim 1 , wherein the hole collection layer is shallower than the epitaxial layer.
3. The semiconductor device of claim 1 , wherein the drain layer is connected to a power supply potential, and the source layer, the hole collection layer, the element isolation layer and the semiconductor substrate are connected to a ground potential.
4. The semiconductor device of claim 1 , wherein the hole collection layer is disposed in the epitaxial layer of the second general conductivity type.
5. The semiconductor device of claim 1 , further comprising a drain isolation contact layer of the first general conductivity type, which is disposed in the drain isolation layer.
6. The semiconductor device of claim 1 , further comprising:
a contact layer of the first general conductivity type formed in the body layer and in direct contact with the source layer; and
a source electrode connected to both the contact layer and the source layer.
7. A semiconductor device comprising:
a semiconductor substrate of a first general conductivity type;
an epitaxial layer of a second general conductivity type formed on the semiconductor substrate;
a buried layer of the second general conductivity type formed in a boundary region between the semiconductor substrate and the epitaxial layer;
a drift layer of the second general conductivity type formed in a surface portion of the epitaxial layer;
an element isolation layer of the first general conductivity type formed in the epitaxial layer so as to surround the drift layer;
a drain layer of the second general conductivity type connected to a drain electrode of the semiconductor device and formed in a surface portion of the drift layer;
a hole collection layer of the first general conductivity type connected to a collector electrode of the semiconductor device and formed in a surface portion of the epitaxial layer that is between the drift layer and the element isolation layer, the hole collection layer being disposed in the epitaxial layer of the second general conductivity type;
a guard ring layer of the second general conductivity type formed in a surface portion of the epitaxial layer so as to be in direct contact with and surrounding an upper portion of the hole collection layer at a surface of the epitaxial layer, wherein the hole collection layer extends into the epitaxial layer below the guard ring layer, the element isolation layer surrounding the guard ring layer; a body layer of the first general conductivity type formed in a surface portion of the epitaxial layer;
a source layer of the second general conductivity type formed in a surface portion of the body layer;
a gate insulation film formed on a surface portion of the body layer; and
a gate electrode of the semiconductor device formed on the gate insulation film.
8. The semiconductor device of claim 7 , wherein the hole collection layer is shallower than the epitaxial layer.
9. The semiconductor device of claim 7 , wherein the drain layer and the hole collection layer are connected to a power supply potential, and the semiconductor substrate is connected to a ground potential.
10. The semiconductor device of claim 7 , wherein a top surface of the buried layer is in contact only with the epitaxial layer of the second general conductivity type.
11. The semiconductor device of claim 7 , further comprising:
a contact layer of the first general conductivity type formed in the body layer and in direct contact with the source layer; and
a source electrode connected to both the contact layer and the source layer.
12. A semiconductor device comprising:
a semiconductor substrate of a first general conductivity type;
an epitaxial layer of a second general conductivity type formed on the semiconductor substrate;
a buried layer of the second general conductivity type formed in a boundary region between the semiconductor substrate and the epitaxial layer;
a drift layer of the first general conductivity type formed in a surface portion of the epitaxial layer;
an element isolation layer of the first general conductivity type formed in the epitaxial layer so as to surround the drift layer;
a drain layer of the first general conductivity type formed in a surface portion of the drift layer and connected to a drain electrode of the semiconductor device;
a hole collection layer of the first general conductivity type connected to a collector electrode of the semiconductor device and formed in a surface portion of the epitaxial layer that is between the drift layer and the element isolation layer;
a guard ring layer of the second general conductivity type formed in a surface portion of the epitaxial layer so as to be in direct contact with and surrounding an upper portion of the hole collection layer at a surface of the epitaxial layer, wherein the hole collection layer extends into the epitaxial layer below the guard ring layer, the element isolation layer surrounding the epitaxial layer containing the guard ring layer;
a body layer of the second general conductivity type formed in a surface portion of the epitaxial layer, and being parallel with the drift layer, the body layer not being formed between the drift layer and the collector layer;
a source layer of the first general conductivity type formed in a surface portion of the body layer; a gate insulation film formed on a surface portion of the body layer; and
a gate electrode of the semiconductor device formed on the gate insulation film.
13. The semiconductor device of claim 12 , wherein the hole collection layer is shallower than the epitaxial layer.
14. The semiconductor device of claim 12 , wherein the source layer and the hole collection layer are connected to a power supply potential, and the semiconductor substrate is connected to a ground potential.
15. A method of forming a semiconductor device comprising:
forming a semiconductor substrate of a first general conductivity type;
forming an epitaxial layer of a second general conductivity type on the semiconductor substrate;
forming a buried layer of the second general conductivity type in a boundary region between the semiconductor substrate and the epitaxial layer;
forming a drift layer of the second general conductivity type in a surface portion of the epitaxial layer;
forming an element isolation layer of the first general conductivity type in the epitaxial layer so as to surround the drift layer;
forming a drain layer of the second general conductivity type in a surface portion of the drift layer and connected to a drain terminal of the semiconductor device;
forming a drain isolation layer of the first general conductivity type in the epitaxial layer so as to surround the drift layer and the drain layer;
forming a hole collection layer of the first general conductivity type in a surface portion of the epitaxial layer that is between the drain isolation layer and the element isolation layer, wherein the hole collection layer is connected to a collector terminal of the semiconductor device;
forming a guard ring layer of the second general conductivity type in a surface portion of the epitaxial layer so as to be in direct contact with and surrounding an upper portion of the hole collection layer at a surface of the epitaxial layer, wherein the hole collection layer extends into the epitaxial layer below the guard ring layer, the element isolation layer surrounding the epitaxial layer containing the guard ring layer;
forming a body layer of the first general conductivity type in a surface portion of the epitaxial layer;
forming a source layer of the second general conductivity type in a surface portion of the body layer;
forming a gate insulation film on a surface portion of the body layer; and
forming a gate electrode of the semiconductor device on the gate insulation film.
16. The method of claim 15 , wherein the hole collection layer is formed shallower than the epitaxial layer.
17. The method of claim 15 , wherein the drain layer is formed connected to a power supply potential, and the source layer, the hole collection layer, the element isolation layer and the semiconductor substrate are connected to a ground potential.
18. The method of claim 15 , wherein forming the hole collection layer comprises forming the hole collector layer in the epitaxial layer of the second general conductivity type.
19. The method of claim 15 , further comprising forming a drain isolation contact layer of the first general conductivity type in the drain isolation layer.
20. The method of claim 15 , further comprising:
forming a contact layer of the first general conductivity type formed in the body layer and in direct contact with the source layer; and
forming a source electrode connected to both the contact layer and the source layer.