IP Library Granted Patent US 8,995,139
Granted Patent B2
US 8,995,139 · App. 13/331,784 · Granted Mar 31, 2015

Circuit device and method of manufacturing the same

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Quick Facts
Patent No.
US 8,995,139
App. No.
13/331,784
Granted
Mar 31, 2015
Kind
B2
Abstract

Provided is a circuit device in which encapsulating resin to encapsulate a circuit board is optimized in shape, and a method of manufacturing the circuit device. A hybrid integrated circuit device, which is a circuit device according to the present invention includes a circuit board, a circuit element mounted on a top surface of the circuit board, and encapsulating resin encapsulating the circuit element, and coating the top surface, side surfaces, and a bottom surface of the circuit board. In addition, the encapsulating resin is partly recessed and thereby provided with recessed areas at two sides of the circuit board. The providing of the recessed areas reduces the amount of resin to be used, and prevents the hybrid integrated circuit device from being deformed by the cure shrinkage of the encapsulating resin.

Claims (59)

1. A circuit device comprising:

a circuit board having a conductive pattern and a circuit element mounted on a top surface of the circuit board;

encapsulating resin coating the top surface, side surfaces, and a bottom surface of the circuit board;

leads fixed to the circuit board and arranged along a first side-edge and a second side-edge of the encapsulating resin, wherein each of the leads has an end drawn from the encapsulating resin;

a first recessed area formed in the encapsulating resin and at least partially disposed between a third side-edge of the encapsulating resin and the circuit board, wherein:

the first recessed area is spaced apart from the third side-edge of the encapsulating resin and a fourth side-edge of the encapsulating resin;

the first recessed area is on a first side of the encapsulating resin and extends along a thickness direction of the circuit device;

the first recessed area comprises a bottom surface formed of the encapsulating resin;

the bottom surface of the first recessed area is spaced apart from a second side of the encapsulating resin;

a first portion of the first recessed area is located above the circuit board; and

a second portion of the first recessed area is located between the third side-edge of the encapsulating resin and the circuit board.

2. The circuit device according to claim 1 , wherein the bottom surface of the first recessed area has a step-like shape.

3. The circuit device according to claim 1 , further comprising

a first depressed area provided at the third side-edge of the encapsulating resin, the first depressed area extending from the third side-edge of the encapsulating resin toward the circuit board; and

a second depressed area provided at the fourth side-edge of the encapsulating resin, the second depressed area extending from the fourth side-edge of the encapsulating resin toward the circuit board.

4. The circuit device according to claim 1 , wherein cutaway portions are formed in corners of the encapsulating resin.

5. The circuit device according to claim 1 , wherein the circuit element comprises a capacitor, a resistor, a transistor, or an integrated circuit.

6. The circuit device according to claim 3 , further comprising:

a first screw extending through the first depressed area and configured to mount the circuit device to a surface; and

a second screw extending through the second depressed area and configured to mount the circuit device to the surface.

7. The circuit device according to claim 1 , wherein

the first and second side-edges of the encapsulating resin both have a larger sloping surface on the first side of the encapsulating resin than on the second side of the encapsulating resin, and

the third side-edge of the encapsulating resin and the fourth side-edge of the encapsulating resin both have a larger sloping surface on the second side of the encapsulating resin than on the first side of the encapsulating resin.

8. The circuit device according to claim 1 , wherein the first recessed area comprises a sloped edge.

9. The circuit device according to claim 1 , wherein the recessed area has an asymmetrical shape.

10. A circuit device comprising:

a circuit board having a conductive pattern and semiconducting die electrically coupled to the conductive pattern;

an encapsulating resin formed on a top surface, side surfaces, and a bottom surface of the circuit board;

leads fixed to the circuit board and each having an end drawn from the encapsulating resin, wherein the leads are arranged along a first side-edge of the encapsulating resin and a second side-edge of the encapsulating resin;

a first recessed area formed in the encapsulating resin in a thickness direction of the circuit device, wherein the first recessed area is spaced apart from a third side-edge of the encapsulating resin and a fourth side-edge of the encapsulating resin, and wherein a first portion of the first recessed area is located above the circuit board and a second portion of the first recessed area is located between the circuit board and the third-side edge of the encapsulating resin; and

a second recessed area formed in the encapsulating resin in the thickness direction of the circuit device, wherein the second recessed area is spaced apart from the third side-edge of the encapsulating resin and the fourth side-edge of the encapsulating resin, and wherein a first portion of the second recessed area is located above the circuit board and a second portion of the second recessed area is located between the circuit board and the fourth-side edge of the encapsulating resin,

wherein the circuit board is disposed at least partially between the first recessed area and the second recessed area.

11. The circuit device of claim 1 , wherein the circuit device further comprises a second recessed area formed in the encapsulating resin and at least partially disposed between the fourth side-edge of the encapsulating resin and the circuit board, wherein:

the second recessed area is spaced apart from the third side-edge of the encapsulating resin and the fourth side-edge of the encapsulating resin;

the second recessed area is on the first side of the encapsulating resin and extends along the thickness direction of the circuit device; and

the second recessed area comprises a bottom surface formed of the encapsulating resin;

the bottom surface of the second recessed area is spaced apart from the second side of the encapsulating resin;

a first portion of the second recessed area is located above the circuit board;

a second portion of the second recessed area is located between the fourth side-edge of the encapsulating resin and the circuit board.

12. The circuit device of claim 4 , wherein the cutaway portions are disposed on the second side of the encapsulating resin.

13. The circuit device of claim 10 , further comprising

a first depressed area provided at the third side-edge of the encapsulating resin, the first depressed area extending from the third side-edge of the encapsulating resin toward the circuit board; and

a second depressed area provided at the fourth side-edge of the encapsulating resin, the second depressed area extending from a fourth side-edge of the encapsulating resin toward the circuit board.

14. The circuit device of claim 13 , further comprising:

a first screw extending through the first depressed area and configured to mount the circuit device to a surface; and

a second screw extending through the second depressed area and configured to mount the circuit device to the surface.

15. The circuit device of claim 10 , where the first recessed area comprises a sloped edge, and wherein the second recessed area comprises a sloped edge.

16. The circuit device of claim 10 , where the first recessed area is spaced apart from the first side-edge of the encapsulating resin and the second side-edge of the encapsulating resin, and wherein the second recessed area is spaced apart from the first side-edge of the encapsulating resin and the second side-edge of the encapsulating resin.

17. The circuit device of claim 10 , wherein cutaway portions are formed in corners of the encapsulating resin.

18. A circuit device comprising:

a circuit board having a conductive pattern and semiconducting die electrically coupled to the conductive pattern;

an encapsulating resin formed on a top surface, side surfaces, and a bottom surface of the circuit board;

leads fixed to the circuit board and each having an end drawn from the encapsulating resin, wherein the leads are arranged along a first side-edge of the encapsulating resin and a second side-edge of the encapsulating resin;

a first recessed area formed in the encapsulating resin in a thickness direction of the circuit device, wherein the first recessed area is spaced apart from a third side-edge of the encapsulating resin and a fourth side-edge of the encapsulating resin, and wherein a first portion of the first recessed area is located above the circuit board and a second portion of the first recessed area is located between the circuit board and the third-side edge of the encapsulating resin;

a second recessed area formed in the encapsulating resin in the thickness direction of the circuit device, wherein the second recessed area is spaced apart from the third side-edge of the encapsulating resin and the fourth side-edge of the encapsulating resin, and wherein a first portion of the second recessed area is located above the circuit board and a second portion of the second recessed area is located between the circuit board and the fourth-side edge of the encapsulating resin, and wherein the circuit board is disposed at least partially between the second portion of the first recessed area and the second portion of the second recessed area;

a third recessed area formed in the encapsulating resin in the thickness direction of the circuit device, wherein the third recessed area is spaced apart from the third side-edge of the encapsulating resin and the fourth side-edge of the encapsulating resin, and wherein a first portion of the third recessed area is located above the circuit board and a second portion of the third recessed area is located between the circuit board and the third-side edge of the encapsulating resin;

a fourth recessed area formed in the encapsulating resin in the thickness direction of the circuit device, wherein the fourth recessed area is spaced apart from the third side-edge of the encapsulating resin and the fourth side-edge of the encapsulating resin, and wherein a first portion of the fourth recessed area is located above the circuit board and a second portion of the fourth recessed area is located between the circuit board and the fourth-side edge of the encapsulating resin, and wherein the circuit board is disposed at least partially between the second portion of the third recessed area and the second portion of the fourth recessed area;

a first depressed area provided at the third side-edge of the encapsulating resin, the first depressed area extending from the third side-edge of the encapsulating resin toward the circuit board, wherein the first depressed area is at least partially disposed between the second portion of the first recessed area and the second portion of the third recessed area; and

a second depressed area provided at the fourth side-edge of the encapsulating resin, the second depressed area extending from a fourth side-edge of the encapsulating resin toward the circuit board, wherein the second depressed area is at least partially disposed between the second portion of the second recessed area and the second portion of the fourth recessed area.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 23, 2012
From: SAKAMOTO, HIDEYUKI
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, L.L.C.
Reel/Frame 027578/0264 →