Power-up signal generation circuit of semiconductor apparatus
View Patent ↗A power-up signal generation circuit of a semiconductor apparatus includes a driver configured to generate a power-up signal in response to a first voltage. The power-up signal generation circuit may also comprise a power control unit configured to provide the first voltage or a second voltage as a power supply voltage to the driver in response to the power-up signal.
1. A power-up signal generation circuit of a semiconductor apparatus comprising:
a driver configured to generate a power-up signal using a power supply voltage in response to a first voltage; and
a power control unit configured to provide the first voltage as the power supply voltage to the driver after the power-up signal is activated, and provide a second voltage as the power supply voltage to the driver before the power-up signal is activated,
wherein a level of the second voltage is different from a level of the first voltage.
2. The power-up signal generation circuit according to claim 1 , wherein the first voltage comprises one of internal voltages of the semiconductor apparatus.
3. The power-up signal generation circuit according to claim 1 , wherein the second voltage is supplied from a node external to the semiconductor apparatus.
4. A power-up signal generation circuit comprising:
a driver configured to generate a power-up signal in response to a power supply voltage and an input voltage; and
a power control unit configured to provide an external voltage as the power supply voltage to the driver before the power-up signal is asserted, and change the power supply voltage to a voltage having the same level as the input voltage after the power-up signal is asserted,
wherein a level of the external voltage is different from a level of the input voltage.
5. The power-up signal generation circuit according to claim 4 , wherein the external voltage is supplied from a node external to the semiconductor apparatus.
6. The power-up signal generation circuit according to claim 4 , wherein the input voltage comprises one of internal voltages of the semiconductor apparatus.
7. A power-up signal generation circuit comprising:
a driver configured to generate a preliminary power-up signal in response to a first voltage;
a signal combination unit configured to combine the preliminary power-up signal and a test mode signal and generate a power-up signal; and
a power control unit configured to provide the first voltage or a second voltage as a power supply voltage to the driver in response to the power-up signal.
8. The power-up signal generation circuit according to claim 7 , further comprising a level shifter configured to shift the preliminary power-up signal to the level of the second voltage and provide the shifted signal to the signal combination unit.
9. The power-up signal generation circuit according to claim 7 , wherein the power control unit provides the first voltage as the power supply voltage to the driver after the power-up signal is asserted.
10. The power-up signal generation circuit according to claim 7 , wherein the power control unit provides the second voltage as the power supply voltage to the driver before the power-up signal is asserted.
11. The power-up signal generation circuit according to claim 7 , wherein the first voltage comprises one of internal voltages of the semiconductor apparatus.
12. The power-up signal generation circuit according to claim 7 , wherein the second voltage comprises an external voltage, wherein the external voltage is supplied from a node external to the semiconductor apparatus.
13. The power-up signal generation circuit according to claim 7 , comprising circuitry to force the power-up signal to remain asserted during a test mode.
14. A method of generating a power-up signal in a semiconductor apparatus, comprising:
generating a first power-up signal in response to a first voltage, wherein a power-up signal is generated from the first power-up signal; and
providing the first voltage as a power supply voltage to generate the first power-up signal after the power-up signal is activated, and providing a second voltage as the power supply voltage to generate the first power-up signal before the power-up signal is activated,
wherein a level of the second voltage is different from a level of the first voltage.
15. The method of generating a power-up signal in a semiconductor apparatus according to claim 14 , wherein the first voltage comprises one of internal voltages of the semiconductor apparatus.
16. The method of generating a power-up signal in a semiconductor apparatus according to claim 14 , wherein the second voltage comprises an external voltage, wherein the external voltage is supplied from a node external to the semiconductor apparatus.