Method of manufacturing semiconductor device having pre-silicide nitrogen implant
View Patent ↗According to one embodiment, a method of manufacturing a semiconductor device which includes a MISFET, includes: forming a gate insulating film on a semiconductor substrate; forming a gate electrode on the gate insulating film; implanting nitrogen equal to or more than 5.0e14 atoms/cm 2 and equal to or less than 1.5e15 atoms/cm 2 in the semiconductor substrate by tilted ion implantation in a direction from an outside to an inside with respect to side surfaces of the gate electrode; depositing a metal film including nickel on areas in which nitrogen atoms are implanted, the areas are in a semiconductor substrate on both sides of the gate electrode; and performing first heat processing of reacting the metal film and the semiconductor substrate and forming metal semiconductor compound layers, the shapes of the layers are controlled by the nitrogen profiles of the areas.
1. A method of manufacturing a semiconductor device which comprises a metal insulator semiconductor field effect transistor (MISFET), the method comprising:
forming a gate insulating film on a semiconductor substrate;
forming a gate electrode on the gate insulating film;
implanting nitrogen ions equal to or more than 5.0e14 cm −2 and equal to or less than 1.5e15 cm −2 in the semiconductor substrate at both sides of the gate electrode by tilted ion implantation in a direction from an outside to an inside with respect to side surfaces of the gate electrode;
depositing a metal film including nickel on areas in which nitrogen ions are implanted, the areas being in the semiconductor substrate on both sides of the gate electrode;
performing a first heat processing of reacting the metal film and the areas and forming metal semiconductor compound layers;
removing an unreacted metal film after the first heat processing; and
performing a second heat processing at a temperature higher than a temperature of the first heat processing,
wherein the temperature of the first heat processing is 275° C. or more and 350° C. or less, and the metal semiconductor compound layers after the second heat processing are NiSi (nickel silicide) phase, and facet surfaces are formed in boundaries between a channel area and the metal semiconductor compound layers.
2. The method according to claim 1 , wherein shapes of the metal semiconductor compound layers are controlled by the nitrogen profiles of the areas.
3. The method according to claim 1 , wherein a tilting angle of the tilted ion implantation is 15° or more and 75° or less.
4. The method according to claim 1 , wherein the semiconductor substrate is silicon.
5. The method according to claim 1 , wherein the gate insulating film is formed on (100) plane of the semiconductor substrate.
6. The method according to claim 5 , wherein the temperature of the second heat processing is 400° C. or more and 450° C. or less.
7. The method according to claim 1 , wherein the temperature of the second heat processing is 400° C. or more and 450° C. or less.
8. A method of manufacturing a semiconductor device which comprises a metal insulator semiconductor field effect transistor (MISFET), the method comprising:
forming a gate insulating film on a SOI (Silicon On Insulator) substrate;
forming a gate electrode on the gate insulating film;
implanting nitrogen ions equal to or more than 5.0e14 cm −2 and equal to or less than 1.5e15 cm −2 in the SOI substrate at both sides of the gate electrode by tilted ion implantation in a direction from an outside to an inside with respect to side surfaces of the gate electrode;
depositing a metal film including nickel on areas in which nitrogen ions are implanted, the areas are in the SOI substrate on both sides of the gate electrode; and
performing a first heat processing of reacting the metal film and the areas and forming metal semiconductor compound layers;
removing an unreacted metal film after the first heat processing; and
performing a second heat processing at a temperature higher than a temperature of the first heat processing,
wherein the temperature of the first heat processing is 275° C. or more and 350° C. or less, and the metal semiconductor compound layers after the second heat processing are NiSi (nickel silicide) phase, and facet surfaces are formed in boundaries between a channel area and the metal semiconductor compound layers.
9. The method according to claim 8 , wherein shapes of the metal semiconductor compound layers are controlled by the nitrogen profiles of the areas such that the metal semiconductor compound layers do not contact an upper surface of a BOX (buried oxide) layer of the SOI substrate.
10. The method according to claim 8 , wherein a tilting angle of the tilted ion implantation is 15° or more and 75° or less.
11. The method according to claim 8 , wherein the gate insulating film is formed on (100) plane of the SOI substrate.
12. The method according to claim 11 , wherein the temperature of the second heat processing is 400° C. or more and 450° C. or less.
13. The method according to claim 8 , wherein the temperature of the second heat processing is 400° C. or more and 450° C. or less.