IP Library Granted Patent US 8,432,200
Granted Patent B1
US 8,432,200 · App. 13/343,719 · Granted Apr 30, 2013

Self-tracking adaptive bandwidth phase-locked loop

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Quick Facts
Patent No.
US 8,432,200
App. No.
13/343,719
Granted
Apr 30, 2013
Kind
B1
Abstract

A phase-locked loop (PLL) generates an oscillator signal based on an input reference signal. A voltage-to-current converter converts a control voltage to a first current and a current-controlled oscillator generates the oscillator signal based on the first current. A dual charge pump circuit generates first and second charge pump currents having a predetermined ratio based on fractions of the calibration current and the first current and an error (feedback) signal. An active loop filter generates the control voltage based on the first and second charge pump currents and includes a transconductance stage having a transconductance that varies with the variation in a third current. The variation in the transconductance causes the second charge pump current to vary, which in turn adjusts the predetermined ratio between the first and second charge pump currents.

Claims (39)

1. A phase-locked loop (PLL), comprising:

a calibration circuit for generating a calibration current;

a voltage-controlled oscillator (VCO), including:

a voltage-to-current converter for converting a control voltage to a first current; and

a current-controlled oscillator, connected to the voltage-to-current converter and the calibration circuit, for generating an oscillator signal based on at least one of the first current and the calibration current;

a phase detector, connected to the VCO, for generating an error signal based on an input reference signal and a fraction of the oscillator signal;

a current adder circuit, connected to the voltage-to-current converter and the calibration circuit, for summing a fraction of the first current and a fraction of the calibration current to generate a second current;

a reference current generation circuit, connected to the calibration circuit, for generating a third current;

a dual charge pump circuit, including a first charge pump and a second charge pump, connected to the phase detector and the current adder circuit, for receiving the error signal and the second current, and generating first and second charge pump currents having a predetermined ratio, wherein the second charge pump current is generated by summing a fraction of the second current and a fraction of the third current; and

an active loop filter connected to the dual charge pump circuit, the reference current generation circuit and the voltage-to-current converter, wherein the active loop filter generates the control voltage based on the first and second charge pump currents, and wherein the active loop filter includes:

an input capacitance that varies with variation in the predetermined ratio of the first and second charge pump currents; and

a transconductance stage having a transconductance that varies based on the third current.

2. The PLL of claim 1 , wherein the calibration circuit includes a digital-to-analog current source, connected to the current-controlled oscillator and the reference current generation circuit, for receiving the third current from the reference current generation circuit and generating the calibration current.

3. The PLL of claim 1 , further comprising a frequency divider, connected between the current-controlled oscillator and the phase detector, for providing the fraction of the oscillator signal to the phase detector.

4. The PLL of claim 3 , further comprising a buffer circuit, connected to the current-controlled oscillator, the calibration circuit and the frequency divider, for converting the oscillator signal to a rail-to-rail voltage and providing the rail-to-rail voltage to the calibration circuit.

5. The PLL of claim 1 , wherein the predetermined ratio varies with the variation in the third current.

6. The PLL of claim 1 , further comprising a current programming circuit, connected between the current adder circuit and the dual charge pump circuit, for varying the predetermined ratio between the first and second charge pump currents.

7. The PLL of claim 6 , wherein the current programming circuit varies a value of the second current.

8. The PLL of claim 1 , wherein the active loop filter is an active low pass filter.

9. The PLL of claim 1 , wherein current adder circuit scales the first current by a factor α and scales the calibration current by a factor β and sums the scaled currents to generate the second current.

10. The PLL of claim 1 , wherein the third current is scaled by a factor μ and the scaled third current is summed with the second current before being provided to the second charge pump.

11. A system for generating an oscillator signal, the system comprising:

a calibration circuit for generating a calibration current;

a voltage-to-current converter for converting a control voltage to a first current;

a current-controlled oscillator, connected to the voltage-to-current converter and the calibration circuit, for generating an oscillator signal based on at least one of the first current and the calibration current;

a phase detector, connected to the current-controlled oscillator, for generating an error signal based on an input reference signal and a fraction of the oscillator signal;

a current adder circuit, connected to the voltage-to-current converter and the calibration circuit, for summing a fraction of the first current and a fraction of the calibration current to generate a second current;

a reference current generation circuit, connected to the calibration circuit, for generating a third current;

a dual charge pump circuit including first and second charge pumps, connected to the phase detector and the current adder circuit, for receiving the error signal and the second current, and generating first and second charge pump currents having a predetermined ratio, wherein the second charge pump current is generated by summing a fraction of the second current and a fraction of the third current; and

an active loop filter connected to the dual charge pump circuit, the reference current generation circuit and the voltage-to-current converter, wherein the active loop filter generates the control voltage based on the first and second charge pump currents, and wherein the active loop filter includes:

an input capacitance that varies with variation in the predetermined ratio of the first and second charge pump currents; and

a transconductance stage having a transconductance that varies based on the third current.

12. The system for generating an oscillator signal of claim 11 , wherein the calibration circuit includes a digital-to-analog current source, connected to the current-controlled oscillator and the reference current generation circuit, for receiving the third current from the reference current generation circuit and generating and providing the calibration current to the current-controlled oscillator.

13. The system for generating an oscillator signal of claim 11 , further comprising a frequency divider, connected between the current-controlled oscillator and the phase detector, for generating and providing the fraction of the oscillator signal to the phase detector.

14. The system for generating an oscillator signal of claim 13 , further comprising a buffer circuit, connected to the current-controlled oscillator, the calibration circuit and the frequency divider, for converting the oscillator signal to a rail-to-rail voltage and providing the rail-to-rail voltage to the calibration circuit.

15. The system for generating an oscillator signal of claim 11 , further comprising a current programming circuit, connected between the current adder circuit and the dual charge pump circuit, wherein the current programming circuit receives the second current from the current adder circuit and generates a first scaled current that is provided to the first charge pump and a second scaled current that is combined with the third current and provided to the second charge pump, whereby the current programming circuit varies the predetermined ratio between the first and second charge pump currents.

16. The system for generating an oscillator signal of claim 15 , wherein the third current is scaled by a factor of μ before being combined with the second scaled current and provide to the second charge pump.

17. The system for generating an oscillator signal of claim 11 , wherein active loop filter includes an input capacitor connected between an output of the first charge pump and ground, for generating the input capacitance, and an output capacitor connected between an output of the transconductance stage and ground.

18. The system for generating an oscillator signal of claim 11 , wherein current adder circuit scales the first current by a factor α and scales the calibration current by a factor β and sums the scaled currents to generate the second current.

Assignments (21)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
MERGER Recorded Jan 3, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041144/0363 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0455 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0521 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0476 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
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SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Apr 20, 2013
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To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 5, 2012
From: THAKUR, KRISHNA
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 027480/0903 →