IP Library Assignment 037357/0476
Patent Assignment
Reel/Frame 037357/0476

Patent Release

Recorded: 2015-12-21 Pages: 14
Assignor
Assignee
FREESCALE SEMICONDUCTOR, INC.
6501 WILLIAM CANNON DRIVE WEST, AUSTIN, TEXAS, 78735
Covered Properties (93)
Process of Forming an Electronic Device Including a Plurality of Singulated Die
Application: 13/343,207 →
Publication: US 2012/0104626
Semiconductor Wafer Plating Bus
Patent: 8,519,513 →
Application: 13/343,318 →
Publication: US 2013/0168830
Non-Volatile Memory (Nvm) and Logic Integration
Patent: 8,658,497 →
Application: 13/343,331 →
Publication: US 2013/0171785
Self-Tracking Adaptive Bandwidth Phase-Locked Loop
Patent: 8,432,200 →
Application: 13/343,719 →
Capacitance-To-Voltage Interface Circuits
Patent: 8,766,650 →
Application: 13/344,415 →
Publication: US 2012/0105079
Transistors and Semiconductor Devices with Oxygen-Diffusion Barrier Layers
Patent: 8,853,792 →
Application: 13/344,431 →
Publication: US 2012/0104515
Semiconductor Devices with Nonconductive Vias
Patent: 8,796,855 →
Application: 13/350,090 →
Publication: US 2013/0181350
Semiconductor Devices with Compliant Interconnects
Patent: 9,324,667 →
Application: 13/350,098 →
Publication: US 2013/0181340
Digital to Analog Converter for Phase Locked Loop
Patent: 8,525,598 →
Application: 13/351,232 →
Publication: US 2013/0181780
Skewed Sram Cell
Patent: 8,773,940 →
Application: 13/351,935 →
Publication: US 2013/0182494
Fully Decoupled Lateral Axis Gyroscope with Thickness-Insensitive Z-Axis Spring and Symmetric Teeter Totter Sensing Element
Patent: 8,689,632 →
Application: 13/351,937 →
Publication: US 2013/0180332
Pipelined Analog-to-Digital Converter Having Reduced Power Consumption
Patent: 8,487,803 →
Application: 13/355,657 →
Publication: US 2013/0187805
Localized Alloying for Improved Bond Reliability
Patent: 9,331,050 →
Application: 13/355,748 →
Publication: US 2012/0153464
Circuit for Generating Multi-Phase Non-Overlapping Clock Signals
Patent: 8,487,683 →
Application: 13/356,610 →
Publication: US 2013/0187696
Digital Voltage Level Shifter
Patent: 8,432,189 →
Application: 13/356,615 →
Single Supply Digital Voltage Level Shifter
Patent: 8,350,592 →
Application: 13/356,626 →
Method for Dual Edge Clock and Buffer Tree Synthesis
Patent: 8,448,114 →
Application: 13/356,636 →
Method for Driving a Ptc Electrical Load Element
Patent: 8,461,780 →
Application: 13/358,039 →
Publication: US 2012/0119678
Semiconductor Device Having a Nanotube Layer and Method for Forming
Patent: 8,883,639 →
Application: 13/358,137 →
Publication: US 2013/0187274
Method of Forming a Semiconductor Structure
Patent: 8,587,070 →
Application: 13/359,174 →
Publication: US 2012/0126289
Delay Line Phase Shifter with Selectable Phase Shift
Patent: 8,988,165 →
Application: 13/360,119 →
Publication: US 2013/0194017
Adjustable Power Splitter and Corresponding Methods & Apparatus
Patent: 8,514,007 →
Application: 13/360,473 →
Publication: US 2013/0194023
Mems Device Assembly and Method of Packaging Same
Patent: 9,131,325 →
Application: 13/360,920 →
Publication: US 2012/0175747
Encapsulant with Corosion Inhibitor
Patent: 9,117,756 →
Application: 13/361,171 →
Publication: US 2013/0193576
Structure and Method for Healing Tunnel Dielectric of Non-Volatile Memory Cells
Patent: 8,947,940 →
Application: 13/361,191 →
Publication: US 2013/0194875
Packaged Integrated Circuit Using Wire Bonds
Patent: 8,912,667 →
Application: 13/362,636 →
Publication: US 2013/0193589
Semiconductor Device Having Different Non-Volatile Memories Having Nanocrystals of Differing Densities and Method Therefor
Patent: 8,679,912 →
Application: 13/362,697 →
Publication: US 2013/0193506
Systems and Methods for Reducing Branch Misprediction Penalty
Patent: 9,092,225 →
Application: 13/362,720 →
Publication: US 2013/0198490
Vibration Robust X-Axis Ring Gyro Transducer
Patent: 9,759,563 →
Application: 13/362,873 →
Publication: US 2013/0192363
Mems Device with Stress Isolation and Method of Fabrication
Patent: 8,810,030 →
Application: 13/365,454 →
Publication: US 2012/0126345
Cellular Modem Processing
Patent: 9,198,224 →
Application: 13/366,347 →
Publication: US 2012/0183029
Charge Pump Voltage Regulator
Patent: 8,519,780 →
Application: 13/368,793 →
Publication: US 2013/0200943
Stack-Based Trace Message Generation for Debug and Device Thereof
Patent: 8,984,344 →
Application: 13/369,563 →
Publication: US 2013/0212438
Power Supply Circuit for Reduced Wake-Up Time
Patent: 8,907,651 →
Application: 13/370,282 →
Publication: US 2013/0207635
Data Processing System Operable in Single and Multi-Thread Modes and Having Multiple Caches and Method of Operation
Patent: 8,966,232 →
Application: 13/370,420 →
Publication: US 2013/0212585
Low Voltage CMOS Power on Reset Circuit
Patent: 9,143,137 →
Application: 13/371,307 →
Publication: US 2013/0207696
Method and Apparatus for High Pressure Sensor Device
Patent: 8,686,550 →
Application: 13/371,635 →
Publication: US 2013/0207207
Diversity Antenna System and Transmission Method
Patent: 9,130,632 →
Application: 13/382,716 →
Publication: US 2012/0099474
Data Administration Unit, Data Access Unit, Network Element, Network, and Method for Updating a Data Structure
Patent: 9,935,815 →
Application: 13/382,779 →
Publication: US 2012/0117340
Integrated Circuit, Transceiver and Method for Leakage Cancellation in a Receive Path
Patent: 8,917,204 →
Application: 13/382,789 →
Publication: US 2012/0112956
Signal Processing System and Integrated Circuit Comprising a Prefetch Module and Method Therefor
Patent: 9,652,413 →
Application: 13/382,796 →
Publication: US 2012/0124336
Diversity Receiver and Transceiver
Patent: 8,897,343 →
Application: 13/384,253 →
Publication: US 2012/0114025
Signal Processing System, Integrated Circuit Comprising Buffer Control Logic and Method Therefor
Patent: 8,667,190 →
Application: 13/384,835 →
Publication: US 2012/0131241
Controller System, Integrated Circuit and Method Therefor
Patent: 9,320,095 →
Application: 13/388,468 →
Publication: US 2012/0133292
Electronic Device with Protection Circuit
Patent: 8,605,398 →
Application: 13/389,179 →
Publication: US 2012/0134060
Transistor Power Switch Device and Method of Measuring Its Characteristics
Patent: 8,779,794 →
Application: 13/389,194 →
Publication: US 2012/0133388
Encoding Module, Apparatus and Method for Determining a Position of a Data Bit Within an Interleaved Data Stream
Patent: 8,638,244 →
Application: 13/389,205 →
Publication: US 2012/0147988
Device and Method for Turbo-Encoding a Block of Data
Patent: 8,924,829 →
Application: 13/391,296 →
Publication: US 2012/0151295
Software Probe Minimization
Patent: 8,762,960 →
Application: 13/391,744 →
Publication: US 2012/0185830
Duty Cycle Corrector and Duty Cycle Correction Method
Patent: 8,552,778 →
Application: 13/392,638 →
Publication: US 2012/0169391
Device and Method for Performing Conditional Bitwise Set/Clear/Toggle Manipulations in a General Purpose Register
Patent: 9,135,008 →
Application: 13/392,925 →
Publication: US 2012/0155570
System and Method for Filtering Received Data Units
Patent: 9,331,982 →
Application: 13/392,977 →
Publication: US 2012/0179892
Distributed Debug System
Patent: 8,924,795 →
Application: 13/393,589 →
Publication: US 2012/0185730
Semiconductor Device Package Having Backside Contact and Method for Manufacturing
Patent: 8,685,790 →
Application: 13/397,034 →
Publication: US 2013/0207255
Data Processing System with Latency Tolerance Execution
Patent: 9,135,014 →
Application: 13/397,452 →
Publication: US 2013/0212358
Transistor-Level Layout Synthesis
Patent: 8,726,218 →
Application: 13/398,177 →
Publication: US 2012/0159412
Semiconductor Devices and Methods of Assembling Same
Patent: 8,735,223 →
Application: 13/398,811 →
Publication: US 2013/0056861
Method of Packaging Semiconductor Die with Cap Element
Patent: 8,859,336 →
Application: 13/398,816 →
Publication: US 2012/0238058
Lead Frame with Coined Inner Leads
Application: 13/398,824 →
Publication: US 2012/0248589
Lead Frame Sulfur Removal
Patent: 8,440,507 →
Application: 13/400,405 →
Mems Pressure Transducer Assembly and Method of Packaging Same
Patent: 8,889,451 →
Application: 13/400,966 →
Publication: US 2013/0214365
System for Testing Electronic Circuits
Patent: 8,855,962 →
Application: 13/401,847 →
Publication: US 2013/0218508
Embedded Electrical Component Surface Interconnect
Patent: 9,245,819 →
Application: 13/402,413 →
Publication: US 2013/0215583
Non-Volatile Memory Cell and Logic Transistor Integration
Patent: 8,536,007 →
Application: 13/402,426 →
Publication: US 2013/0214346
Single Period Phase to Digital Converter
Patent: 8,390,347 →
Application: 13/402,844 →
Method for Forming Die Assembly with Heat Spreader
Patent: 9,059,144 →
Application: 13/403,458 →
Publication: US 2013/0221511
Recoverable and Reconfigurable Pipeline Structure for State-Retention Power Gating
Patent: 8,587,356 →
Application: 13/403,597 →
Publication: US 2013/0154707
Metal-Insulator-Metal Capacitor
Patent: 9,142,607 →
Application: 13/403,743 →
Publication: US 2013/0221482
Successive Approximation Analog-to-Digital Converter
Patent: 8,487,805 →
Application: 13/403,945 →
Inter-Partition Communication in Multi-Core Processor
Application: 13/403,964 →
Publication: US 2013/0227243
Data Processor with Asynchronous Reset
Application: 13/403,969 →
Publication: US 2013/0227257
Embedded Electronic Component
Patent: 8,556,159 →
Application: 13/404,945 →
Publication: US 2013/0221076
Hierarchical Error Correction
Patent: 8,914,712 →
Application: 13/405,965 →
Publication: US 2013/0227368
Combined Environmental Parameter Sensor
Patent: 9,103,705 →
Application: 13/406,439 →
Publication: US 2013/0219994
Voltage Clamping Circuit
Patent: 8,493,122 →
Application: 13/410,267 →
Bipolar Primary Sense Amplifier
Patent: 8,659,964 →
Application: 13/412,680 →
Publication: US 2013/0235686
Method for Implementing Security of Non-Volatile Memory
Patent: 9,471,812 →
Application: 13/413,162 →
Publication: US 2013/0238831
Semiconductor Device with Composite Drift Region
Patent: 9,478,456 →
Application: 13/413,440 →
Publication: US 2013/0234246
Semiconductor Package and Lead Frame Therefor
Patent: 8,643,158 →
Application: 13/413,652 →
Publication: US 2012/0248590
Method for Testing Comparator and Device Therefor
Patent: 9,134,395 →
Application: 13/414,697 →
Publication: US 2013/0234743
Multiple Page Size Memory Management Unit
Patent: 9,323,691 →
Application: 13/415,196 →
Publication: US 2013/0238875
Circuit and Method for Measuring Voltage
Patent: 8,935,117 →
Application: 13/416,892 →
Publication: US 2013/0238273
Data Processing System with Latency Tolerance Execution
Patent: 9,141,391 →
Application: 13/419,531 →
Publication: US 2012/0303936
Sample and Hold Circuit and Differential Sample and Hold Circuit
Patent: 8,513,982 →
Application: 13/424,064 →
Microelectromechanical System Package and Method of Testing
Patent: 9,116,165 →
Application: 13/431,469 →
Publication: US 2013/0257445
Integrated Circuit Having a Staggered Heterojunction Bipolar Transistor Array
Application: 13/431,506 →
Publication: US 2013/0256756
Method of Reading Memory Cell
Patent: 8,320,201 →
Application: 13/434,881 →
Publication: US 2012/0188837
Phase Locked Loop with Adaptive Biasing
Patent: 8,487,677 →
Application: 13/434,946 →
Phase Locked Loop with Adaptive Loop Filter
Patent: 8,598,955 →
Application: 13/435,089 →
Publication: US 2013/0257546
Fully Complementary Self-Biased Differential Receiver with Startup Circuit
Patent: 8,823,454 →
Application: 13/435,981 →
Publication: US 2013/0257513
Systems with Multiple Port Random Number Generators and Methods of Their Operation
Patent: 9,092,283 →
Application: 13/436,052 →
Publication: US 2013/0262542
Random Value Production Methods and Systems
Patent: 8,856,198 →
Application: 13/436,074 →
Publication: US 2013/0262543
Microelecronic Assembly with an Embedded Waveguide Adapter and Method for Forming the Same
Patent: 8,283,764 →
Application: 13/436,432 →
Publication: US 2012/0223325
Related Assignments (25)
Other recorded transfers of the patents in this record — the chain of ownership.
Security Agreement Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
Patent Release Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0521 →
Patent Release Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0455 →
Assignment and Assumption of Security Interest in Patents Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
Assignment and Assumption of Security Interest in Patents Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
Assignment of Assignor's Interest Feb 4, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NORTH STAR INNOVATIONS INC.
Reel/Frame 037694/0264 →
Security Agreement Supplement Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
Supplement to the Security Agreement Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
Corrective Assignment to Correct the Remove Application 12092129 Previously Recorded on Reel 038017 Frame 0058. Assignor(S) Hereby Confirms the Security Agreement Supplement. Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
Patent Release Aug 17, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 039707/0471 →
Release of Security Interest Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
Release of Security Interest Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
Change of Name Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
Merger Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040652/0241 →
Change of Name Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
Merger Jan 3, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041144/0363 →
Corrective Assignment to Correct the Nature of Conveyance Previously Recorded at Reel: 040652 Frame: 0241. Assignor(S) Hereby Confirms the Merger and Change of Name. Jan 5, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041260/0850 →
Corrective Assignment to Correct the Nature of Conveyance Listed Change of Name Should Be Merger and Change Previously Recorded at Reel: 040652 Frame: 0180. Assignor(S) Hereby Confirms the Merger and Change of Name. Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
Corrective Assignment to Correct the Remove Patents 8108266 and 8062324 and Replace Them with 6108266 and 8060324 Previously Recorded on Reel 037518 Frame 0292. Assignor(S) Hereby Confirms the Assignment and Assumption of Security Interest in Patents. Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
Assignment of Assignor's Interest Feb 15, 2017
From: NORTH STAR INNOVATIONS INC.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 041717/0736 →
Corrective Assignment to Correct the Remove Application 12681366 Previously Recorded on Reel 039361 Frame 0212. Assignor(S) Hereby Confirms the Security Agreement Supplement. May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
Corrective Assignment to Correct the Remove Application 12681366 Previously Recorded on Reel 038017 Frame 0058. Assignor(S) Hereby Confirms the Security Agreement Supplement. May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
Assignment of Assignor's Interest Sep 5, 2017
From: GUILLOT, LAURENT; ABOUDA, KAMEL; ROSADO, PHILIPPE; JOOS, ULI
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 043491/0127 →
Corrective Assignment to Correct the Nature of Conveyance Previously Recorded at Reel: 040632 Frame: 0001. Assignor(S) Hereby Confirms the Merger and Change of Name. Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 044209/0047 →
Corrective Assignment to Correct the to Correct the Application No. from 13,883,290 to 13,833,290 Previously Recorded on Reel 041703 Frame 0536. Assignor(S) Hereby Confirms the the Assignment and Assumption of Security Interest in Patents.. Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →