IP Library Granted Patent US 9,134,395
Granted Patent B2
US 9,134,395 · App. 13/414,697 · Granted Sep 15, 2015

Method for testing comparator and device therefor

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Quick Facts
Patent No.
US 9,134,395
App. No.
13/414,697
Granted
Sep 15, 2015
Kind
B2
Abstract

An integrated circuit facilitates a self test routine that verifies proper operation of an analog comparator. In response to entering the self test routine, the voltage provided to an input of a comparator is changed from being at an operating voltage supply to being at a self test voltage that is used to verify operation of the comparator. In response to the comparator operating properly, the self test voltage provided to the input of the comparator is replaced with the operating voltage supply, and normal operation resumes. The duration of the self test cycle is based upon the amount of time during which the self test voltage is provided to the comparator is asynchronous in nature, and therefore not a function of a clock signal.

Claims (34)

1. A method comprising:

comparing with a comparator a first voltage used to power a set of devices of an integrated circuit to a first reference voltage;

determining, based upon the comparison, that the first voltage meets an operating criteria;

entering a self-test mode of operation from a first mode of operation responsive to receiving a first self-test indicator;

responsive to entering the self-test mode of operation, testing the comparator to verify that the comparator is operational to detect a violation of the operating criteria when the test generates a test state at the output of the comparator; and

in response to determining the comparator is operational, returning to the first mode of operation asynchronously.

2. The method of claim 1 further comprising:

providing the first voltage to a first input of a multiplexor;

providing a second reference voltage to a second input of the multiplexor; and

wherein testing comprises selecting the second input of the multiplexor to provide the second reference voltage to the comparator instead of the first voltage.

3. The method of claim 2 , wherein the second reference voltage is within 300 millivolts of the first reference voltage, wherein the first reference voltage is between the first voltage and the second reference voltage.

4. The method of claim 1 further comprising providing the self-test indicator in response to determining an indicator at a programmable storage location that enables self test has been asserted.

5. The method of claim 1 , further comprising: providing the self-test indicator in response to determining an indicator at a programmable storage location that enables self test has been asserted, wherein only one first self-test indicator is asserted in response to the indicator at the programmable storage location being asserted.

6. The method of claim 1 , further comprising: providing the self-test indicator in response to determining an indicator at a programmable storage location that enables self test has been asserted, wherein a plurality of self-test indicators, including the first self-test indicator, are provided on a periodic interval in response to the indicator at the programmable storage location being asserted.

7. The method of claim 6 , wherein a duration of the periodic interval is based upon a value stored at a second programmable storage location.

8. The method of claim 1 , wherein returning to the first mode of operation occurs within 300 ns of entering the self-test mode of operation.

9. The method of claim 1 further comprising:

generating the first voltage reference and the second voltage reference based on a bandgap reference.

10. The method of claim 9 , wherein the first voltage reference and the second voltage reference are generated using separate circuitry for each reference voltage based on the band gap reference.

11. The method of claim 9 , wherein the first voltage reference and the second voltage reference are generated by substantially the same circuitry.

12. The method of claim 1 further comprising: providing an asserted self-test result indicator in response to determining the comparator is operational, otherwise, providing a negated self-test result indicator in response to determining the comparator is not operational.

13. A method comprising:

providing a first voltage to a set of devices that are to operate within a first voltage range defined by a first trip voltage and a second trip voltage;

providing by a first select circuit the first voltage to a first input of a first comparator;

providing the first trip voltage to a second input of the first comparator;

providing a first state at an output of the first comparator while providing the first voltage and the first trip voltage to the first comparator, the first state at the output of the first comparator indicative of the first voltage meeting the operating criteria defined by the first trip voltage;

at a first time, switching from providing by the select circuit the first voltage to providing a first self-test voltage to the first input of the first comparator, the first self test being outside of the first voltage range;

responsive to providing the first self-test voltage, determining whether the output of the first comparator is at a second state; and

responsive to the output of the comparator being in the second state, and independent of any user software intervention, switching the select circuit from providing the first self-test voltage to providing the first voltage to the first input of the first comparator.

14. The method of claim 13 further comprising:

providing by a second select circuit the first voltage to a first input of a second comparator;

providing the second trip voltage to a second input of the second comparator;

providing the first state at an output of the second comparator while providing the first voltage and the second trip voltage to the second comparator, the first state at the second comparator indicative of the first voltage meeting the operating criteria defined by the second trip voltage; and

at a second time, switching from providing by the second select circuit the first voltage to providing a second trip voltage to the first input of the second comparator, the second trip voltage being outside the first voltage range.

Assignments (25)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
MERGER Recorded Jan 3, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041144/0363 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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