IP Library Granted Patent US 9,324,667
Granted Patent B2
US 9,324,667 · App. 13/350,098 · Granted Apr 26, 2016

Semiconductor devices with compliant interconnects

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Quick Facts
Patent No.
US 9,324,667
App. No.
13/350,098
Granted
Apr 26, 2016
Kind
B2
Abstract

A method forms a connecting pillar to a bonding pad of an integrated circuit. A seed layer is formed over the bond pad. Photoresist is deposited over the integrated circuit. An opening is formed in the photoresist over the bond pad. The connecting pillar is formed in the opening by plating.

Claims (25)

1. A method of forming a connecting pillar to a bond pad of an integrated circuit:

forming a seed layer over the bond pad;

depositing photoresist over the seed layer;

forming a first opening in the photoresist over the bond pad, wherein a largest cross-sectional diameter of the first opening is within a perimeter of the bond pad and the first opening has substantially the same diameter from a bottom of the first opening to a top of the first opening;

forming a lower portion of a connecting pillar in the first opening by plating, wherein the lower portion is in contact with the seed layer;

forming a second photoresist layer having a second opening over the bond pad;

forming a mid portion of the connecting pillar in the second opening by plating, wherein the mid portion is in contact with the lower portion, the mid portion has a cross-sectional diameter that is less than a smallest cross-sectional diameter of the lower portion;

forming a cap portion by allowing plating to overflow sides of the second opening, the cross-sectional diameter of the mid portion is less than a cross-sectional diameter of the cap portion.

2. The method of claim 1 , further comprising etching back a central portion of the connecting pillar to reduce the diameter of the mid portion of the connecting pillar.

3. The method of claim 2 , wherein forming the connecting pillar comprises changing materials from a first material to a second material during plating, wherein the second material is in the mid portion and reduced in diameter during the step of etching back.

4. The method of claim 1 , wherein the step of forming the connecting pillar is further characterized by the connecting pillar extending above the top of the first opening.

5. The method of claim 4 , further comprising:

removing the photoresist; and

removing a portion of the seed layer using the connecting pillar as a mask.

6. The method of claim 1 , wherein

the second opening has a second diameter less than the first diameter.

7. The method of claim 6 , wherein the step of forming the connecting pillar comprises plating in the first opening prior to the step of forming the second photoresist layer.

8. The method of claim 7 , wherein the step of forming the connecting pillar comprises plating in the second opening.

9. The method of claim 1 , wherein the step of forming the connecting pillar comprises changing a material being plated so that material plated above the second photoresist layer is a different material than material plated in the first opening.

10. The method of claim 1 , further comprising plating a top of the connecting pillar with solder.

11. The method of claim 1 , wherein the step of depositing photoresist comprises:

depositing a layer of photoresist;

exposing a portion of the photoresist in a pattern of an area over the bond pad; and

applying a hardener to harden a top portion of the photoresist;

wherein the step of forming the opening comprises opening the area over the bond pad and laterally extending the area over the bond pad in a region below the top portion of the photoresist.

Assignments (22)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 044209/0047 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0455 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0521 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0476 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Apr 20, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 030256/0670 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Apr 20, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030256/0655 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Apr 20, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030256/0582 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 16, 2012
From: UEHLING, TRENT S.; KLINGBEIL, LAWRENCE S.; VADIPOUR, MOSTAFA; WILKERSON, BRETT P.; HIGGINS, LEO M., III
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 027537/0960 →