IP Library Granted Patent US 8,779,794
Granted Patent B2
US 8,779,794 · App. 13/389,194 · Granted Jul 15, 2014

Transistor power switch device and method of measuring its characteristics

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Quick Facts
Patent No.
US 8,779,794
App. No.
13/389,194
Granted
Jul 15, 2014
Kind
B2
Abstract

A transistor power switch device comprising an array of vertical transistor elements for carrying current between first and second faces of a semiconductor body. The device also comprises a semiconductor monitor element comprising first and second semiconductor monitor regions in the semiconductor body and a monitor conductive layer distinct from the current carrying conductive layer of the transistor array. The semiconductor monitor element presents semiconductor properties representative of the transistor array. Characteristics of the semiconductor monitor element are measured as representative of characteristics of the transistor array. Source metal ageing of a transistor power switch device is monitored by measuring and recording a parameter which is a function of a sheet resistance of the monitor conductive layer when the transistor power switch device is new and comparing it with its value after operation of the device. A measured current is applied between a first location on an elongate strip element of the monitor conductive layer and a first location on one of a pair of lateral extensions of the strip, and the corresponding voltage developed between a second location on the elongate strip element and the other of said pair of lateral extensions is measured.

Claims (58)

1. A transistor power switch device comprising:

a semiconductor body presenting opposite first and second faces,

an array of vertical transistor elements for carrying current between said first and second faces, said array of transistor elements comprising:

at said first face an array of first current carrying transistor regions of a first semiconductor type; and

at said second face a second current carrying transistor region of said first semiconductor type;

at least one third current carrying transistor region of a second semiconductor type opposite to said first type interposed between said first semiconductor regions and said second current carrying transistor region;

at least one control electrode for switchably controlling flow of said current through said third transistor region; and

a current carrying conductive layer contacting said first current carrying transistor regions at said first face;

said transistor power switch device also comprising:

at least one semiconductor monitor element presenting semiconductor properties representative of said vertical transistor elements of said array whereby measurement of intrinsic characteristics of said semiconductor monitor element is representative of intrinsic characteristics of said vertical transistor elements, said semiconductor monitor element comprising:

first and second semiconductor monitor regions in said semiconductor body electrically in contact with said first and second faces respectively; and

a monitor conductive layer distinct from said current carrying conductive layer contacting said first semiconductor monitor region at said first face.

2. A transistor power switch device as claimed in claim 1 , wherein said semiconductor monitor regions and said monitor conductive layer of said monitor element have been manufactured by the same manufacturing steps as corresponding semiconductor regions and said current carrying conductive layer of said vertical transistor elements of said array.

3. A transistor power switch device as claimed in claim 1 , wherein said first semiconductor monitor region of said semiconductor monitor element occupies an active area at said first face which is at least one order of magnitude smaller than the aggregate active areas of said first current carrying transistor regions of said array.

4. A transistor power switch device as claimed in claim 1 , wherein said semiconductor monitor element is permanently connected in parallel to said array of transistor elements, whereby to be subjected to the same operating voltages of said current carrying conductive layers in use.

5. A transistor power switch device as claimed in claim 1 , wherein said semiconductor monitor element comprises a vertical transistor element presenting characteristics representative of characteristics of said vertical transistor elements of said array.

6. A transistor power switch device as claimed in claim 1 , wherein said semiconductor monitor element comprises a vertical diode, said first semiconductor monitor region being of said second semiconductor type and said second semiconductor monitor region being of said first semiconductor type.

7. A transistor power switch device as claimed in claim 6 , wherein said semiconductor monitor element comprises a monitor electrode and insulating layer structure similar to a structure of said control electrode and said at least one insulating layer of said array of transistor elements, said monitor electrode and insulating layer structure being interposed between said monitor conductive layer and said first face.

8. A transistor power switch device as claimed in claim 1 , wherein said monitor conductive layer comprises:

an elongate strip element; and

at least one pair of lateral extensions to said elongate strip element extending transversely to the length of a central elongate strip element on opposite sides thereof and defining an intersection with said elongate strip element,

whereby a test current may be applied between a first location on one of said pair of lateral extensions and a first location on said elongate strip element so as to develop a corresponding voltage between a second location on the other of said pair of lateral extensions and a second location on said elongate strip element, said second locations being on opposite sides of said intersection to said first locations, respectively, and said test current and said corresponding voltage may be measured.

9. A transistor power switch device as claimed in claim 8 , wherein said semiconductor monitor element comprises a plurality of said pair of lateral extensions defining a plurality of said intersections with said elongate strip element spaced apart laterally of said first face along said elongate strip element.

10. A method of measuring a characteristic of a transistor power switch device, wherein the transistor power switch device includes:

a semiconductor body presenting opposite first and second faces;

an array of vertical transistor elements for carrying current between said first and second faces, said array of transistor elements comprising:

at said first face an array of first current carrying transistor regions of a first semiconductor type; and

at said second face a second current carrying transistor region of said first semiconductor type;

at least one third current carrying transistor region of a second semiconductor type opposite to said first type interposed between said first semiconductor regions and said second current carrying transistor region;

at least one control electrode for switchably controlling flow of said current through said third transistor region; and

a current carrying conductive layer contacting said first current carrying transistor regions at said first face;

said transistor power switch device also comprising:

at least one semiconductor monitor element presenting semiconductor properties representative of said vertical transistor elements of said array whereby measurement of intrinsic characteristics of said semiconductor monitor element is representative of intrinsic characteristics of said vertical transistor elements, said semiconductor monitor element comprising:

first and second semiconductor monitor regions in said semiconductor body electrically in contact with said first and second faces respectively, and a monitor conductive layer distinct from said current carrying conductive layer contacting said first semiconductor monitor region at said first face;

the method comprising measuring a characteristic of said semiconductor monitor element.

11. A method of measuring a parameter of a transistor power switch device as claimed in claim 10 , wherein said monitor conductive layer comprises:

an elongate strip element; and

at least one pair of lateral extensions to said elongate strip element extending transversely to the length of a central elongate strip element on opposite sides thereof and defining an intersection with said elongate strip element,

whereby a test current may be applied between a first location on one of said pair of lateral extensions and a first location on said elongate strip element so as to develop a corresponding voltage between a second location on the other of said pair of lateral extensions and a second location on said elongate strip element, said second locations being on opposite sides of said intersection to said first locations, respectively, and said test current and said corresponding voltage may be measured,

the method further comprising:

applying a current between said first location on one of said pair of lateral extensions and said first location on said elongate strip element so as to develop a corresponding voltage between said second location on the other of said pair of lateral extensions and said second location on said elongate strip element;

measuring said current flowing between said first locations; and

measuring said corresponding voltage.

12. A method of monitoring source metal ageing to which a transistor power switch device has been subjected,

the transistor power switch device comprising:

a semiconductor body presenting opposite first and second faces;

an array of vertical transistor elements for carrying current between said first and second faces, a current carrying conductive layer at said first face contacting said vertical transistor elements;

at least one semiconductor monitor element comprising first and second semiconductor monitor regions in said semiconductor body electrically in contact with said first and second faces respectively, and a monitor conductive layer distinct from said current carrying conductive layer contacting said first semiconductor monitor region at said first face,

the method comprising:

measuring and recording a parameter which is a function of a sheet resistance of said monitor conductive layer when the transistor power switch device is new; and

comparing the recorded value of said parameter with a value of said parameter after operation of the same power switch device.

13. A method of monitoring source metal ageing to which a transistor power switch device has been subjected as claimed in claim 12 , wherein

said monitor conductive layer comprises an elongate strip element and at least one pair of lateral extensions to said elongate strip element extending transversely to the length of a central elongate strip element on opposite sides thereof and defining an intersection with said elongate strip element; and

said method comprises:

applying a test current between a first location on one of said pair of lateral extensions and a first location on said elongate strip element so as to develop a corresponding voltage between a second location on the other of said pair of lateral extensions and a second location on said elongate strip element, said second locations being on opposite sides of said intersection to said first locations, respectively; and

measuring said test current and said corresponding voltage.

14. A method of monitoring source metal ageing to which a transistor power switch device has been subjected as claimed in claim 12 , wherein said semiconductor monitor element comprises:

a plurality of said pairs of lateral extensions defining a plurality of said intersections with said elongate strip element spaced apart laterally of said first face along said elongate strip element.

Assignments (31)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 044209/0047 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
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PATENT RELEASE Recorded Dec 21, 2015
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Jun 18, 2013
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 6, 2012
From: BERNOUX, BEATRICE; ESCOFFIER, RENE; REYNES, MICHEL JEAN
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