IP Library Granted Patent US 9,965,106
Granted Patent B2
US 9,965,106 · App. 13/350,018 · Granted May 8, 2018

Touch screen with electrodes positioned between pixels

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Quick Facts
Patent No.
US 9,965,106
App. No.
13/350,018
Granted
May 8, 2018
Kind
B2
Abstract

In one embodiment, an apparatus includes a two-dimensional array of pixels configured to produce an image. The apparatus also includes a touch sensor comprising a plurality of electrodes aligned with one or more gaps between one more pixels of the two-dimensional array of pixels. The plurality of electrodes are aligned such that the plurality of electrodes do not cross over at least one pixel of the two-dimensional array of pixels.

Claims (48)

1. An apparatus, comprising:

a two-dimensional array of pixels configured to produce an image; and

a touch sensor comprising a plurality of electrodes, the plurality of electrodes comprising:

a first plurality of electrodes extending generally in a first direction; and

a second plurality of electrodes extending generally in a second direction, the first and second directions being different directions;

the plurality of electrodes aligned with one or more gaps between two or more pixels of the two-dimensional array of pixels such that:

the first plurality of electrodes and the second plurality of electrodes do not cross over at least one pixel of the two-dimensional array of pixels; and

a vertex formed by a crisscrossing, in plan view, of an electrode of the first plurality of electrodes and an electrode of the second plurality of electrodes is aligned with at least one of the one or more gaps between the two or more pixels of the two-dimensional array of pixels, wherein the electrode of the first plurality of electrodes and the electrode of the second plurality of electrodes are configured to capacitively couple across a dielectric material at the vertex.

2. The apparatus of claim 1 , wherein:

the two-dimensional array of pixels comprises one or more layers within a display stack; and

the plurality of electrodes of the touch sensor is between the two-dimensional array of pixels and a top layer of the display stack.

3. The apparatus of claim 1 , wherein:

the two-dimensional array of pixels comprises one or more layers within a display stack; and

the plurality of electrodes of the touch sensor is coupled to a top layer of the display stack.

4. The apparatus of claim 1 , wherein the plurality of electrodes comprises a mesh of substantially straight electrodes.

5. The apparatus of claim 1 , wherein the plurality of electrodes comprises a mesh of substantially sinusoidal electrodes.

6. The apparatus of claim 5 , wherein a distance between a peak and a valley of any given wave of the substantially sinusoidal electrodes is based on a distance of a gap between two respective pixels of the two-dimensional array of pixels.

7. The apparatus of claim 1 , wherein the plurality of electrodes comprises a mesh of fine lines of metal electrodes.

8. The apparatus of claim 1 , wherein the two-dimensional array of pixels comprises a two-dimensional array of liquid crystal display (LCD) pixels configured to produce an image.

9. The apparatus of claim 1 , wherein the two-dimensional array of pixels comprises a two-dimensional array of organic light emitting diode (OLED) pixels configured to produce an image.

10. The apparatus of claim 1 , wherein the two-dimensional array of pixels and the touch sensor are flexible.

11. The apparatus of claim 1 , wherein each electrode of the plurality of electrodes comprises a width that is based on a distance of a gap between two respective pixels.

12. A method, comprising:

receiving a display module comprising a two-dimensional array of pixels configured to produce an image;

receiving a touch sensor comprising a plurality of electrodes, the plurality of electrodes comprising:

a first plurality of electrodes extending generally in a first direction; and

a second plurality of electrodes extending generally in a second direction, the first and second directions being different directions;

aligning the plurality of electrodes with one or more gaps between one more pixels of the two-dimensional array of pixels such that:

the first plurality of electrodes and the second plurality of electrodes do not cross over at least one pixel of the two-dimensional array of pixels; and

a vertex formed by a crisscrossing, in plan view, of an electrode of the first plurality of electrodes and an electrode of the second plurality of electrodes is aligned with at least one of the one or more gaps between the two or more pixels of the two-dimensional array of pixels, wherein the electrode of the first plurality of electrodes and the electrode of the second plurality of electrodes are configured to capacitively couple across a dielectric material at the vertex; and

attaching the touch sensor to the display module.

13. The method of claim 12 , wherein the plurality of electrodes comprises a mesh of substantially straight electrodes.

14. The method of claim 12 , wherein the plurality of electrodes comprises a mesh of substantially sinusoidal electrodes.

15. The method of claim 12 , wherein the plurality of electrodes comprises a mesh of fine line metal electrodes.

16. A method, comprising:

forming a display stack comprising a two-dimensional array of pixels configured to produce an image; and

forming a plurality of electrodes of a touch sensor within the display stack, the plurality of electrodes comprising:

a first plurality of electrodes extending generally in a first direction; and

a second plurality of electrodes extending generally in a second direction, the first and second directions being different directions;

the plurality of formed electrodes aligned with one or more gaps between one more pixels of the two-dimensional array of pixels such that:

the first plurality of electrodes and the second plurality of electrodes do not cross over at least one pixel of the two-dimensional array of pixels; and

a vertex formed by a crisscrossing, in plan view, of an electrode of the first plurality of electrodes and an electrode of the second plurality of electrodes is aligned with at least one of the one or more gaps between the two or more pixels of the two-dimensional array of pixels, wherein the electrode of the first plurality of electrodes and the electrode of the second plurality of electrodes are configured to capacitively couple across a dielectric material at the vertex.

17. The method of claim 16 , wherein forming the plurality of electrodes comprises depositing the plurality of electrodes on at least one layer within the display stack.

18. The method of claim 16 , wherein forming the plurality of electrodes comprises laminating the plurality of electrodes on at least one layer within the display stack.

19. The method of claim 16 , wherein the plurality of electrodes comprises a mesh of substantially straight electrodes.

20. The method of claim 16 , wherein the plurality of electrodes comprises a mesh of substantially sinusoidal electrodes.

21. The method of claim 16 , wherein the plurality of electrodes comprises a mesh of fine lines of metal electrodes.

22. The apparatus of claim 1 , wherein a first gap of the one or more gaps between the two or more pixels is between 5 micrometers and 26 micrometers.

Assignments (13)
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: ATMEL CORPORATION
Reel/Frame 059262/0105 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 5, 2019
From: MICROCHIP TECHNOLOGY INC.; ATMEL CORPORATION; MICROCHIP TECHNOLOGY GERMANY GMBH
To: NEODRÓN LIMITED
Reel/Frame 048259/0840 →
RELEASE OF SECURITY INTEREST IN CERTAIN PATENT RIGHTS Recorded Dec 21, 2018
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; ATMEL CORPORATION
Reel/Frame 047976/0884 →
RELEASE OF SECURITY INTEREST IN CERTAIN PATENT RIGHTS Recorded Dec 21, 2018
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; ATMEL CORPORATION
Reel/Frame 047976/0937 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: ATMEL CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041715/0747 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL Recorded Apr 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: ATMEL CORPORATION
Reel/Frame 038376/0001 →
PATENT SECURITY AGREEMENT Recorded Jan 3, 2014
From: ATMEL CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC. AS ADMINISTRATIVE AGENT
Reel/Frame 031912/0173 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 9, 2012
From: ATMEL TECHNOLOGIES U.K. LIMITED
To: ATMEL CORPORATION
Reel/Frame 027676/0504 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 13, 2012
From: GUARD, DAVID BRENT; TREND, MATTHEW
To: ATMEL TECHNOLOGIES U.K. LIMITED
Reel/Frame 027529/0859 →