IP Library Granted Patent US 8,796,820
Granted Patent B2
US 8,796,820 · App. 13/356,799 · Granted Aug 5, 2014

Semiconductor wafer and semiconductor device wafer

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Quick Facts
Patent No.
US 8,796,820
App. No.
13/356,799
Granted
Aug 5, 2014
Kind
B2
Abstract

A semiconductor wafer having a disc shape includes a chamfer provided around a circumferential edge of the wafer, and an anti-cracking and chipping groove provided in one or more areas around one circumference of an end face of the wafer along a circumferential direction of the end face. The anti-cracking and chipping groove is configured to prevent cracking or chipping of the end face in back grinding.

Claims (34)

1. A semiconductor wafer having a disc shape, comprising:

chamfers provided around a circumferential edge of the wafer;

an anti-cracking and chipping groove provided in one or more areas around one circumference of an end face of the wafer along a circumferential direction of the end face,

wherein the chamfers include round chamfers provided around boundaries, respectively, between the anti-cracking and chipping groove and the end face of the wafer,

wherein each of the round chamfers has a curvature radius of not less than 20 μm and not more than 100 μm, and

wherein a depth of the anti-cracking and chipping groove is not less than 20 μm and not more than 200 μm.

2. The semiconductor wafer having a disc shape according to claim 1 , wherein the anti-cracking and chipping groove is configured to prevent cracking or chipping of the end face in back grinding.

3. The semiconductor wafer according to claim 1 , wherein the chamfers provided around the circumferential edge of the wafer further include a front surface chamfer provided around a front surface circumferential edge of the wafer, and

wherein the front surface chamfer has a curvature radius of not less than 20 μm and not more than 100 μm.

4. The semiconductor wafer according to claim 1 , wherein the chamfers provided around the circumferential edge of the wafer further include a chamfer formed around a back surface circumferential edge of the wafer, and the chamfer provided around the back surface circumferential edge of the wafer includes a round chamfer having a curvature radius of not less than 20 μm and not more than 1000 μm.

5. The semiconductor wafer according to claim 1 , wherein the anti-cracking and chipping groove in an area adjacent to a front surface of the wafer is located at a position where a wafer front surface boundary between the anti-cracking and chipping groove and the end face of the wafer becomes a wafer back surface circumferential edge after back grinding.

6. The semiconductor wafer according to claim 5 , wherein the anti-cracking and chipping groove in the area adjacent to the front surface of the wafer is located at a position where a thickness of the wafer after the back grinding is not less than 40 μm and not more than 200 μm.

7. A semiconductor device wafer, comprising:

a semiconductor wafer including a front surface, a back surface, and a side surface, the back surface of the semiconductor wafer being ground;

a device structure layer provided over the front surface of the back surface ground semiconductor wafer,

wherein the side surface of the back surface ground semiconductor wafer is provided with a chamfer having a curvature radius of R d (μm) satisfying (½)t≦R d ≦(⅗)t, where a thickness of the back surface ground semiconductor wafer is t (μm);

an anti-cracking and chipping groove provided in at least one area around a circumference of an end face of the semiconductor wafer along a circumferential direction of the end face; and

round chamfers provided around boundaries, respectively, between the anti-cracking and chipping groove and the end face of the semiconductor wafer.

8. A semiconductor device wafer, comprising:

a semiconductor wafer including a front surface, a back surface, and a side surface, the back surface of the semiconductor wafer being ground;

a device structure layer provided over the front surface of the back surface ground semiconductor wafer,

wherein the side surface of the back surface ground semiconductor wafer includes a front surface boundary with a first chamfer, a back surface boundary with a second chamfer, and an end provided between the front surface boundary and the back surface boundary, and

wherein the first chamfer and the second chamfer have a curvature radius of R d (μm) satisfying ( 1/10)t≦R d ≦(½)t, where a thickness of the back surface ground semiconductor wafer is t (μm), and the end has a curvature radius larger than the R d (μm);

an anti-cracking and chipping groove provided in at least one area around a circumference of an end face of the semiconductor wafer along a circumferential direction of the end face; and

round chamfers provided around boundaries, respectively, between the anti-cracking and chipping groove and the end face of the semiconductor wafer.

9. The semiconductor wafer according to claim 1 , wherein the anti-cracking and chipping groove is located at a position where a boundary between the anti-cracking and chipping groove and the end face of the wafer becomes a back surface circumferential edge of the semiconductor device wafer.

10. The semiconductor wafer according to claim 1 , wherein each of the round chamfers provided around boundaries extends with a round profile from a bottom of said each of the round chamfers to the end face of the semiconductor wafer.

11. The semiconductor wafer according to claim 6 , wherein a side surface curvature radius R d of one of the chamfers provided around the circumferential edge of the wafer satisfies (½)t≦R d ≦(⅗)t, where t denotes the thickness of the wafer after the back grinding.

12. The semiconductor device wafer according to claim 7 , wherein the anti-cracking and chipping groove in an area adjacent to the front surface of the semiconductor wafer is formed at a position where a boundary between the anti-cracking and chipping groove and the end face of the semiconductor wafer becomes a back surface circumferential edge of the semiconductor device wafer.

13. The semiconductor device wafer according to claim 7 , wherein the chamfer provided in the side surface of the back surface ground semiconductor wafer comprises a round chamfer.

14. The semiconductor device wafer according to claim 7 , wherein each of the round chamfers provided around the boundaries extends with a round profile from a bottom of said each of the round chamfers to the end face of the semiconductor wafer.

15. The semiconductor device wafer according to claim 8 , wherein the anti-cracking and chipping groove in an area adjacent to the front surface of the semiconductor wafer is formed at a position where a boundary between the anti-cracking and chipping groove and the end face of the semiconductor wafer becomes a back surface circumferential edge of the semiconductor device wafer.

16. The semiconductor device wafer according to claim 8 , wherein at least one of the first chamfer and the second chamfer comprises a round chamfer.

17. The semiconductor device wafer according to claim 8 , wherein each of the round chamfers provided around the boundaries extends with a round profile from a bottom of said each of the round chamfers to the end face of the semiconductor wafer.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 16, 2016
From: SCIOCS COMPANY LIMITED
To: SUMITOMO CHEMICAL COMPANY, LIMITED
Reel/Frame 037827/0453 →
COMPANY SPLIT Recorded Jul 24, 2015
From: HITACHI METALS, LTD.
To: SCIOCS COMPANY LIMITED
Reel/Frame 036181/0104 →
MERGER Recorded Feb 15, 2014
From: HITACHI CABLE, LTD.
To: HITACHI METALS, LTD.
Reel/Frame 032268/0297 →