IP Library Granted Patent US 8,597,985
Granted Patent B1
US 8,597,985 · App. 13/364,166 · Granted Dec 3, 2013

MEMS packaging with etching and thinning of lid wafer to form lids and expose device wafer bond pads

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Quick Facts
Patent No.
US 8,597,985
App. No.
13/364,166
Granted
Dec 3, 2013
Kind
B1
Abstract

In wafer-level packaging of microelectromechanical (MEMS) devices a lid wafer is bonded to a MEMS wafer in a predetermined aligned relationship. Portions of the lid wafer are removed to separate the lid wafer into lid portions that respectively correspond in alignment with MEMS devices on the MEMS wafer, and to expose areas of the MEMS wafer that respectively contain sets of bond pads respectively coupled to the MEMS devices.

Claims (33)

1. A wafer-level process for packaging microelectromechanical (MEMS) devices, comprising:

bonding a lid wafer to a MEMS wafer in a predetermined aligned relationship; and

removing portions of the lid wafer to separate the lid wafer into lid portions that respectively correspond in alignment with MEMS devices on the MEMS wafer, wherein said removing also exposes areas of the MEMS wafer that respectively contain sets of bond pads respectively coupled to the MEMS devices,

wherein said removing includes thinning the lid wafer after said bonding, and

wherein said removing includes, before said bonding and based on said predetermined aligned relationship, producing cavities in respective areas of the lid wafer that respectively correspond in alignment with said areas of the MEMS wafer, and wherein said thinning opens respective ends of the cavities.

2. The process of claim 1 , wherein said producing includes etching the cavities in the lid wafer.

3. The process of claim 1 , including, before said bonding, providing the lid portions in the lid wafer by, based on said predetermined aligned relationship, producing further cavities in respective further areas of the lid wafer that respectively correspond in alignment with further areas of the MEMS wafer that contain the MEMS devices.

4. A wafer-level process for packaging microelectromechanical (MEMS) devices, comprising:

bonding a lid wafer to a MEMS wafer in a predetermined aligned relationship; and

removing portions of the lid wafer after said bonding in an operation that concurrently thins the lid wafer and separates the lid wafer into discrete lid portions that respectively correspond in alignment with MEMS devices on the MEMS wafer, wherein said removing also exposes areas of the MEMS wafer that respectively contain sets of bond pads respectively coupled to the MEMS devices,

wherein said removing includes, before said bonding and based on said predetermined aligned relationship, producing cavities in respective areas of the lid wafer that respectively correspond in alignment with said areas of the MEMS wafer, and

wherein said producing includes etching the cavities in the lid wafer.

5. The process of claim 4 , wherein said etching includes deep reactive ion etching.

6. A wafer-level process for packaging microelectromechanical (MEMS) devices, comprising:

bonding a lid wafer to a MEMS wafer in a predetermined aligned relationship; and

removing portions of the lid wafer to separate the lid wafer into lid portions that respectively correspond in alignment with MEMS devices on the MEMS wafer, wherein said removing also exposes areas of the MEMS wafer that respectively contain sets of bond pads respectively coupled to the MEMS devices,

wherein said removing includes, before said bonding and based on said predetermined aligned relationship, producing cavities in respective areas of the lid wafer that respectively correspond in alignment with said areas of the MEMS wafer,

the process including, before said bonding, providing the lid portions in the lid wafer by, based on said predetermined alignment relationship, producing further cavities in respective further areas of the lid wafer that respectively correspond in alignment with further areas of the MEMS wafer that contain the MEMS devices.

7. The process of claim 6 , wherein said cavities are deeper than said further cavities.

8. The process of claim 7 , wherein said producing said cavities and said producing said further cavities share an etching operation.

9. A wafer-level process for packaging microelectromechanical (MEMS) devices, comprising:

bonding a lid wafer to a MEMS wafer in a predetermined aligned relationship; and

removing portions of the lid wafer to separate the lid wafer into lid portions that respectively correspond in alignment with MEMS devices on the MEMS wafer, wherein said removing also exposes areas of the MEMS wafer that respectively contain sets of bond pads respectively coupled to the MEMS devices,

wherein said bonding includes bonding first metal seal rings respectively provided on the lid portions to respective second metal seal rings that respectively surround the MEMS devices on the MEMS wafer and are respectively aligned with the first metal seal rings.

10. The process of claim 9 , including providing each of the second metal seal rings between the associated MEMS device and the associated set of bond pads on the MEMS wafer, connecting each of the MEMS devices to the associated set of bond pads with a set of interconnections, and providing an insulating material between the set of interconnections and the associated second metal seal ring.

11. The process of claim 10 , wherein said removing includes thinning the lid wafer after said bonding.

12. The process of claim 11 , wherein said removing includes, before said bonding and based on said predetermined aligned relationship, producing cavities in respective areas of the lid wafer that respectively correspond in alignment with said areas of the MEMS wafer, and wherein said thinning opens respective ends of the cavities.

13. The process of claim 12 , including, before said bonding, providing the lid portions in the lid wafer by, based on said predetermined aligned relationship, producing further cavities in respective further areas of the lid wafer that respectively correspond in alignment with further areas of the MEMS wafer that contain the MEMS devices.

14. The process of claim 10 , wherein said removing includes, before said bonding and based on said predetermined aligned relationship, producing cavities in respective areas of the lid wafer that respectively correspond in alignment with said areas of the MEMS wafer.

15. The process of claim 14 , including, before said bonding, providing the lid portions in the lid wafer by, based on said predetermined aligned relationship, producing further cavities in respective further areas of the lid wafer that respectively correspond in alignment with further areas of the MEMS wafer that contain the MEMS devices.

16. A wafer-level process for packaging microelectromechanical (MEMS) devices, comprising:

bonding a lid wafer to a MEMS wafer in a predetermined aligned relationship; and

based on said predetermined aligned relationship, separating the lid wafer into lid portions that respectively correspond in alignment with MEMS devices on the MEMS wafer, wherein said separating includes etching cavities in one side of the lid wafer and thinning the other side of the lid wafer until said etched cavities penetrate all the way through the thinned lid wafer.

Assignments (3)
CHANGE OF NAME Recorded May 22, 2018
From: SANDIA CORPORATION
To: NATIONAL TECHNOLOGY & ENGINEERING SOLUTIONS OF SANDIA, LLC
Reel/Frame 046207/0012 →
CONFIRMATORY LICENSE Recorded Dec 2, 2013
From: SANDIA CORPORATION
To: U.S. DEPARTMENT OF ENERGY
Reel/Frame 031746/0231 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 13, 2012
From: CHANCHANI, RAJEN; NORDQUIST, CHRISTOPHER; OLSSON, ROY H.; PETERSON, TRACY C.; SCHUL, RANDY J.; AHLERS, CATALINA; PLUT, THOMAS A.; PATRIZI, GARY A.
To: SANDIA CORPORATION
Reel/Frame 028366/0422 →