IP Library Granted Patent US 8,471,367
Granted Patent B2
US 8,471,367 · App. 13/377,940 · Granted Jun 25, 2013

Semiconductor device and method for manufacturing semiconductor device

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Quick Facts
Patent No.
US 8,471,367
App. No.
13/377,940
Granted
Jun 25, 2013
Kind
B2
Abstract

A semiconductor device includes a second oxide film and a pad electrode on a first oxide film that is formed on a front surface of a semiconductor substrate, a contact electrode and a first barrier layer formed in the second oxide film and connected to the pad electrode, a silicide portion formed between the contact electrode and a through-hole electrode layer and connected to the contact electrode and the first barrier layer, a via hole extending from a back surface of the semiconductor substrate to reach the silicide portion and the second oxide film, a third oxide film formed on a sidewall of the via hole and on the back surface of the semiconductor substrate, and a second barrier layer (H) and a rewiring layer formed inside the via hole and on the back surface of the semiconductor substrate and connected to the silicide portion.

Claims (36)

1. A semiconductor device manufacturing method, the method comprising:

forming a first insulating film on a front surface of a semiconductor substrate;

forming an electrode section in the first insulating film;

forming a barrier layer that covers the electrode section;

forming a silicide layer that is connected to the electrode section;

after said forming the silicide layer and said forming the first insulating film, forming a via hole by etching from a back surface toward the front surface of the semiconductor substrate and by using the first insulating film and the silicide layer as an etching stopping layer;

forming a second insulating film on a sidewall and a bottom surface of the via hole and on the back surface of the semiconductor substrate;

etching the second insulating film to expose the silicide layer and the first insulating film in the via hole; and

forming a through-hole electrode layer at the second insulating film on the sidewall of the via hole, the second insulating film on the back surface of the semiconductor substrate, the first insulating film on the bottom surface of the via hole, and the silicide layer.

2. The semiconductor device manufacturing method according to claim 1 , further comprising:

before said forming the through-hole electrode layer, measuring an electrical characteristic of a circuit formed at the semiconductor substrate using the electrode section.

3. A semiconductor device, comprising:

a semiconductor substrate having a front surface and a back surface;

a first insulating film that is formed on the front surface of a semiconductor substrate;

a contact electrode that is formed in the first insulating film and that is covered by a barrier layer;

a via hole that penetrates the semiconductor substrate;

a second insulating film that is formed on a sidewall of the via hole and on the back surface of the semiconductor substrate;

a through-hole electrode layer formed at the second insulating film on the sidewall of the via hole, the second insulating film on the back surface of the semiconductor substrate, and the first insulating film on a bottom surface of the via hole; and

a silicide layer that is formed in the first insulating film and between the contact electrode and the through-hole electrode layer, and that is connected to the contact electrode and to the through-hole electrode layer,

wherein the via hole penetrates the second insulating layer, and

wherein a relationship between a width A of the silicide layer and a width B of a bottom of the via hole in a cross section taken along a plane including a center axis of the via hole satisfies A≦B.

4. The semiconductor device according to claim 3 , wherein a shape of a bottom surface of the through-hole electrode layer is flat, and the bottom surface of the through-hole electrode layer is electrically connected to the contact electrode via the silicide layer.

5. The semiconductor device according to claim 3 , wherein a polysilicon film is formed on the front surface of the semiconductor substrate, and a relationship between a diameter C of the polysilicon film and a diameter A of the silicide layer in a cross section taken along a plane including the center axis of the via hole satisfies C≧A.

6. The semiconductor device according to claim 3 , wherein the first insulating film is one of an SiO 2 film, an oxynitride film, or a nitride film.

7. The semiconductor device according to claim 3 , wherein one of a polysilicon film and an amorphous silicon film is formed on the first insulating film.

8. The semiconductor device according to claim 3 , wherein the silicide layer is made of any one of tungsten silicide, titanium silicide, cobalt silicide, and nickel silicide.

9. The semiconductor device according to claim 3 , wherein the barrier layer is made of one of titanium, titanium nitride, titanium tungsten, tantalum, tantalum nitride, a high melting point metal, and a laminated film made up thereof.

10. The semiconductor device according to claim 3 , wherein a polysilicon film is disposed between the front surface of the semiconductor substrate and the first insulating film, and

wherein the via hole penetrates the polysilicon film.

11. The semiconductor device of claim 10 , wherein the through-hole electrode layer contacts the silicide layer and the first insulating film.

12. The semiconductor device of claim 3 , wherein the through-hole electrode layer contacts the silicide layer and the first insulating film.

13. The method of claim 1 , further comprising:

forming a polysilicon film on the front surface of the semiconductor substrate,

wherein the polysilicon film is disposed between the front surface of the semiconductor substrate and the first insulating film, and the via hole penetrates the polysilicon film.

14. The method of claim 13 , wherein the through-hole electrode layer contacts the silicide layer and the first insulating film.

15. The method of claim 1 , wherein the through-hole electrode layer contacts the silicide layer and the first insulating film.

Assignments (7)
CHANGE OF NAME Recorded Nov 24, 2025
From: INVENSAS CORPORATION
To: INVENSAS LLC
Reel/Frame 073941/0814 →
CHANGE OF NAME Recorded Nov 24, 2025
From: INVENSAS LLC
To: ADEIA SEMICONDUCTOR TECHNOLOGIES LLC
Reel/Frame 073508/0745 →
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION; TESSERA ADVANCED TECHNOLOGIES, INC; DTS, INC.; DTS LLC; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
Reel/Frame 052920/0001 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
SECURITY INTEREST Recorded Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.; DIGITALOPTICS CORPORATION; DIGITALOPTICS CORPORATION MEMS; DTS, LLC; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 27, 2014
From: PANASONIC CORPORATION
To: INVENSAS CORPORATION
Reel/Frame 034042/0112 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 23, 2012
From: SAITO, DAISHIRO; KAI, TAKAYUKI; OKUMA, TAKAFUMI; YAMANISHI, HITOSHI
To: PANASONIC CORPORATION
Reel/Frame 027746/0372 →