IP Library Granted Patent US 9,691,855
Granted Patent B2
US 9,691,855 · App. 13/398,954 · Granted Jun 27, 2017

Method of growing a high quality III-V compound layer on a silicon substrate

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Quick Facts
Patent No.
US 9,691,855
App. No.
13/398,954
Granted
Jun 27, 2017
Kind
B2
Abstract

The present disclosure involves a method of fabricating a semiconductor device. A surface of a silicon wafer is cleaned. A first buffer layer is then epitaxially grown on the silicon wafer. The first buffer layer contains an aluminum nitride (AlN) material. A second buffer layer is then epitaxially grown on the first buffer layer. The second buffer layer includes a plurality of aluminum gallium nitride (Al x Ga 1-x N) sub-layers. Each of the sub-layers has a respective value for x that is between 0 and 1. A value of x for each sub-layer is a function of its position within the second buffer layer. A first gallium nitride (GaN) layer is epitaxially grown over the second buffer layer. A third buffer layer is then epitaxially grown over the first GaN layer. A second GaN layer is then epitaxially grown over the third buffer layer.

Claims (49)

1. An apparatus, comprising:

a semiconductor structure that includes:

a silicon substrate;

a first buffer layer disposed over the silicon substrate, wherein the first buffer layer contains a III-V compound that includes a first group III element and a group V element;

a second buffer layer disposed over the first buffer layer, wherein the second buffer layer includes a plurality of sub-layers that each contain the first group III element, the group V element, and a second group III element, and wherein a content of the first group III element decreases for each sub-layer that is located further away from the first buffer layer, and wherein the content of the first group III element is fixed within each sub-layer but is different from that of the other sub-layers;

a first III-V compound bulk layer disposed over the second buffer layer;

a third buffer layer disposed over the first III-V compound bulk layer;

a fourth buffer layer disposed between the second buffer layer and the first III-V compound bulk layer, wherein the fourth buffer layer is thinner than each of the first buffer layer, the first III-V compound bulk layer, and each of the sub-layers of the second buffer layer, and wherein the fourth buffer layer has a lower aluminum content than each of the sub-layers of the second buffer layer; and

a second III-V compound bulk layer disposed over the third buffer layer, wherein the second III-V compound bulk layer is substantially thicker than the first III-V compound bulk layer.

2. The apparatus of claim 1 , wherein the first group III element is aluminum.

3. The apparatus of claim 1 , wherein:

the first buffer layer contains aluminum nitride (AlN);

the sub-layers of the second buffer layer each contain aluminum gallium nitride (Al x Ga 1-x N), wherein 0<x<1; and

the first III-V compound bulk layer contains gallium nitride (GaN).

4. The apparatus of claim 1 , wherein:

the third buffer layer contains AlN or Al x Ga 1-x N/GaN; and

the first III-V compound bulk layer and the second III-V compound bulk layer each contain GaN.

5. The apparatus of claim 1 , wherein:

the first buffer layer has a thickness less than about 100 nanometers (nm);

the sub-layers of the second buffer layer each have a thickness less than about 150 nm;

the first III-V compound layer has a thickness in a range from about 0.2 microns to about 0.5 microns;

the third buffer layer has a thickness less than about 100 nm; and

the second III-V compound layer has a thickness greater than about 1.5 microns.

6. The apparatus of claim 5 , wherein a sub-layer disposed closest to the first buffer layer has a thickness less than about 100 nm, while the rest of the sub-layers each have a thickness greater than about 100 nm but less than about 150 nm.

7. The apparatus of claim 1 , wherein the semiconductor structure is a part of a light-emitting diode (LED), a radio frequency (RF) device, a high electron mobility transistor (HEMT) device, or a high power semiconductor device.

8. The apparatus of claim 7 , wherein the apparatus further comprises a lighting module in which the LED is implemented.

9. A semiconductor apparatus, comprising:

a silicon substrate;

an aluminum nitride (AlN) buffer layer located on the silicon substrate;

a composite buffer layer located on the AlN buffer layer, the composite buffer layer including at least three aluminum gallium nitride (Al x Ga 1-x N) sub-layers in a stacked arrangement such that a top surface of a lower sub-layer directly contacts a bottom surface of an upper sub-layer, wherein each of the sub-layers has a respective value for x that is between 0 and 1, and wherein x of a given sub-layer is smaller than x of an adjacent below sub-layer;

a first III-V bulk layer located over the composite buffer layer;

an insertion layer disposed on the first III-V bulk layer; and

a second III-V bulk layer located on the insertion layer, wherein the second III-V bulk layer is substantially thicker than the first III-V bulk layer, wherein the first and second III-V bulk layers contain a material that is other than aluminum gallium nitride,

wherein the plurality of the Al x Ga 1-x N sub-layers have different thicknesses that are associated with their respective Al concentration, and wherein the Al concentration remains constant within each of the Al x Ga 1-x N sub-layers.

10. The semiconductor apparatus of claim 9 , wherein:

the first III-V bulk layer and the second III-V bulk layer each contain gallium nitride (GaN); and

the insertion layer contains MN or Al x Ga 1-x N/GaN.

11. The semiconductor apparatus of claim 9 , wherein:

the first III-V bulk layer has a thickness being in a range from about 0.2 microns to about 0.5 microns;

the insertion layer has a thickness less than about 100 nanometers; and

the second III-V bulk layer has a thickness greater than about 1.5 microns.

12. The semiconductor apparatus of claim 9 , wherein:

the AlN buffer layer has a thickness less than about 100 nanometers (nm);

the sub-layer located closest to the AlN buffer layer has a thickness less than about 100 nm; and

the rest of the sub-layers each have a thickness in a range from about 100 nm to about 150 nm.

13. The apparatus of claim 1 , wherein the second III-V compound bulk layer is at least three times thicker than the first III-V compound bulk layer.

14. The apparatus of claim 1 , wherein the first and second buffer layers have different thicknesses that are associated with their respective concentration of the first group III element.

15. The apparatus of claim 3 , wherein a sub-layer that is in the plurality of sub-layers and disposed closest to the first buffer layer has a smallest thickness less than that of each of the rest of the sub-layers.

16. The apparatus of claim 9 , wherein a sub-layer that is in the plurality of sub-layers and disposed closest to the AlN buffer layer has a smallest thickness less than that of each of the rest of the sub-layers.

Assignments (4)
CHANGE OF NAME Recorded Apr 22, 2026
From: EPISTAR CORPORATION
To: ENNOSTAR CORPORATION
Reel/Frame 075513/0783 →
MERGER Recorded Feb 23, 2016
From: CHIP STAR LTD.
To: EPISTAR CORPORATION
Reel/Frame 037805/0571 →
CHANGE OF NAME Recorded Feb 23, 2016
From: TSMC SOLID STATE LIGHTING LTD.
To: CHIP STAR LTD.
Reel/Frame 037809/0929 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2012
From: LI, ZHEN-YU; HSIA, HSING-KUO; KUO, HAO-CHUNG
To: TSMC SOLID STATE LIGHTING LTD.
Reel/Frame 027721/0717 →