Semiconductor laser chip package with encapsulated recess molded on substrate and method for forming same
View Patent ↗A laminate leadless carrier package having a semiconductor chip mounted at the edge of a recess region in a substrate supporting the chip, the substrate having a plurality of conductive and dielectric layers, a wire bond coupled to the optoelectronic chip and a wire bond pad positioned on the top surface of the substrate. An encapsulation covers the laser chip, the wire bond, and at least a portion of the top surface of the substrate including the recess region. The encapsulation is an optically transparent molding compound. The package is arranged to be mounted as a side-looker and/or a top-looker.
1. A laminate leadless carrier package, comprising:
a semiconductor laser chip;
a substrate supporting the semiconductor laser chip, the substrate comprising a plurality of conductive and dielectric layers laminated together, and an edge recess region disposed inset into an edge of the substrate, wherein the semiconductor laser chip is mounted adjacent to the edge recess region;
a wire bond pad positioned on the top surface of the substrate;
a wire bond coupled to the semiconductor laser chip and the wire bond pad; and
an encapsulation covering the semiconductor laser chip, the edge recess region, the wire bond, and at least a portion of the top surface of the substrate, wherein the encapsulation is a molding compound.
2. The laminate leadless carrier package of claim 1 , wherein the semiconductor laser chip is an edge emitting laser.
3. The laminate leadless carrier package of claim 2 , wherein the laminate leadless carrier package is arranged to be mounted in a side-looker configuration on a printed circuit board, wherein the active area of the semiconductor laser chip is perpendicular to the printed circuit board.
4. The laminate leadless carrier package of claim 2 , wherein the laminate leadless carrier package is arranged to be mounted in a top-looker configuration on a printed circuit board, wherein the active area of the semiconductor laser chip is parallel to the printed circuit board.
5. The laminate leadless carrier package of claim 1 , wherein the plurality of conductive and dielectric layers comprise a bottom conductive layer, a top conductive layer, and a dielectric layer between the top and bottom conductive layers.
6. The laminate leadless carrier package of claim 5 , further comprising a plurality of conductive vias providing electrical connections and thermal conduits between the top conductive layer and the bottom conductive layer.
7. The laminate leadless carrier package of claim 1 , wherein the molding compound is optically transparent.
8. A laminate leadless carrier package, comprising:
a semiconductor laser chip;
a substrate supporting the semiconductor laser chip, the substrate comprising a plurality of conductive and dielectric layers laminated together, and an edge recess region disposed within a recess in an edge of the substrate, wherein the semiconductor laser chip is mounted adjacent to the edge recess region;
a wire bond pad positioned on the top surface of the substrate;
a wire bond coupled to the optoelectronic chip and the wire bond pad; and
an encapsulation covering the optoelectronic chip, the wire bond, and at least a portion of the top surface of the substrate, wherein the encapsulation is a molding compound,
wherein the laminate leadless carrier package is arranged to be mounted in a configuration from the group consisting of a side-looker configuration on a printed circuit board, wherein the active area of the optoelectronic chip is perpendicular to the printed circuit board, and a top-looker configuration on a printed circuit board, wherein the active area of the optoelectronic chip is parallel to the printed circuit board.