IP Library Granted Patent US 8,957,655
Granted Patent B2
US 8,957,655 · App. 13/422,917 · Granted Feb 17, 2015

Last gasp hold-up circuit using adaptive constant on time control

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Quick Facts
Patent No.
US 8,957,655
App. No.
13/422,917
Granted
Feb 17, 2015
Kind
B2
Abstract

A hold-up circuit coupled to a first node to receive an input voltage and to provide a hold-up voltage includes an inductor, a constant on-time buck-boost control circuit configured to drive a high-side power switch and a low-side power switch to operate in a buck mode and a boost mode of operation, and an energy storage capacitor. When the input voltage is greater than a predetermined threshold, the buck-boost control circuit is configured in the boost mode to drive the low-side power switch with constant on-time pulses and to charge the energy storage capacitor under non-synchronous operation. When the input voltage is less than a predetermined threshold, the buck-boost control circuit is configured in the buck mode to drive the high-side power switch with constant on-time pulses and to drive the low-side power switch under synchronous operation to provide the hold-up voltage to the first node.

Claims (16)

1. A hold-up circuit coupled to a first node to receive an input voltage and to provide a hold-up voltage, the hold-up circuit comprising:

an inductor coupled between the first node and a second node, the input voltage being provided to the first node;

a constant on-time buck-boost control circuit configured to drive a high-side power switch and a low-side power switch to operate in a buck mode and a boost mode of operation, the low-side switch having a first current handling terminal coupled to the second node and a second current handling terminal coupled to a ground potential, the high-side switch having a first current handling terminal coupled to the second node and a second current handling terminal; and

an energy storage capacitor coupled between the second current handling terminal of the high-side switch and the ground potential,

wherein in response to the input voltage being greater than a predetermined threshold, the buck-boost control circuit is configured in the boost mode to drive the low-side power switch with constant on-time pulses and to charge the energy storage capacitor through the high-side power switch; and in response to the input voltage being less than the predetermined threshold, the buck-boost control circuit is configured in the buck mode to drive the high-side power switch with constant on-time pulses and to drive the low-side power switch under synchronous operation to supply the energy stored on the energy storage capacitor to the inductor to provide the hold-up voltage to the first node.

2. The hold-up circuit of claim 1 , further comprising:

a voltage divider coupled to the first node to divide down the input voltage, the divided voltage being provided to the buck-boost control circuit to configure the buck-boost control circuit to operate in the boost mode or the buck mode.

3. The hold-up circuit of claim 1 , wherein the buck-boost control circuit comprises:

a hold-up comparator configured to compare a voltage indicative of the input voltage to a first reference voltage, the hold-up comparator generating a control signal having a first state indicating a boost mode of operation and a second state indicating a buck mode of operation;

a one-shot circuit configured to generate a constant on-time pulse;

a buck-boost circuit configured to receive the control signal and to drive the high-side power switch with the constant on-time pulse in the buck mode or to drive the low-side power switch with the constant on-time pulse in the boost mode in response to the control signal;

a boost comparator configured to compare a voltage indicative of a voltage across the energy storage capacitor and a second reference voltage, the boost comparator generating an output signal driving the one-shot circuit when the hold-up comparator generates a control signal in the first state; and

a buck comparator configured to compare a voltage indicative of the input voltage and the first reference voltage, the buck comparator generating an output signal driving the one-shot circuit when the boost comparator is not driving the one-shot circuit.

4. The hold-up circuit of claim 3 , wherein the second reference voltage is generated by charging a second capacitor using a current source, the capacitance value of the second capacitor and the current value of the current source determining the second reference voltage.

5. The hold-up circuit of claim 1 , wherein in response to the input voltage being greater than the predetermined threshold, the buck-boost control circuit is configured in the boost mode to drive the low-side power switch with constant on-time pulses and to charge the energy storage capacitor through a body diode of the high-side power switch under non-synchronous operation.

6. The hold-up circuit of claim 1 , wherein in response to the input voltage being greater than the predetermined threshold, the buck-boost control circuit is configured in the boost mode to drive the low-side power switch with constant on-time pulses and to drive the high-side power switch under synchronous operation.

Assignments (10)
INTELLECTUAL PROPERTY BUY-IN AGREEMENT/ASSIGNMENT Recorded Apr 4, 2023
From: MICREL LLC
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 063241/0771 →
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 16, 2012
From: GALINSKI III, MARTIN F.
To: MICREL, INC.
Reel/Frame 027880/0803 →