IP Library Granted Patent US 9,312,194
Granted Patent B2
US 9,312,194 · App. 13/424,968 · Granted Apr 12, 2016

Integrated circuit packaging system with terminals and method of manufacture thereof

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,312,194
App. No.
13/424,968
Granted
Apr 12, 2016
Kind
B2
Abstract

A method of manufacture of an integrated circuit packaging system includes: providing a leadframe having a mounting platform; applying an attach layer on the mounting platform; mounting an integrated circuit die on the attach layer; forming an encapsulation on the integrated circuit die and the attach layer, the mounting platform exposed from the encapsulation; and forming a terminal having a terminal protrusion from the leadframe, the terminal protrusion below a horizontal plane of the mounting platform.

Claims (27)

1. A method of manufacture of an integrated circuit packaging system comprising:

providing a leadframe, of a first metal, having a leadframe platform region;

forming a mounting platform on the leadframe platform region by depositing the mounting platform, of a second metal, on the leadframe platform region;

applying an attach layer directly on the mounting platform;

mounting an integrated circuit die on the attach layer, the attach layer completely covering a non-active side of the integrated circuit die;

forming an encapsulation on the integrated circuit die and the attach layer;

etching the leadframe platform region, to completely remove the first metal, for exposing an entire area of the second metal as a platform bottom side of the mounting platform from the encapsulation and for forming an encapsulation cavity at an encapsulation bottom surface of the encapsulation; and

forming a terminal having a terminal protrusion from the leadframe, the terminal protrusion below the platform bottom side of the mounting platform and the encapsulation separating the terminal from contact with the mounting platform; wherein the first metal is different from the second metal.

2. The method as claimed in claim 1 wherein:

forming the terminal includes forming a top terminal layer; and

providing the leadframe includes providing the mounting platform coplanar to the top terminal layer.

3. The method as claimed in claim 1 wherein forming the encapsulation includes forming the encapsulation cavity having a cavity horizontal dimension larger than a die horizontal dimension.

4. The method as claimed in claim 1 further comprising:

providing a base substrate;

mounting a base integrated circuit die to the base substrate; and

mounting the base substrate to the terminal with the base integrated circuit die below the integrated circuit die.

5. A method of manufacture of an integrated circuit packaging system comprising:

providing a leadframe, of a first metal, having a leadframe platform region;

forming a mounting platform on the leadframe platform region by depositing the mountings platform, of a second metal, on the leadframe platform region;

applying an attach layer directly on the mounting platform;

mounting an integrated circuit die on the attach layer, the attach layer completely covering a non-active side of the integrated circuit die;

forming an encapsulation on the integrated circuit die and the attach layer;

etching the leadframe platform region, to completely remove the first metal, for exposing an entire area of the second metal as a platform bottom side of the mounting platform from the encapsulation and for forming an encapsulation cavity at an encapsulation bottom surface, the encapsulation cavity shaped by the leadframe platform region; and

removing portions of the leadframe for forming a terminal having a terminal protrusion, the terminal protrusion extends below the platform bottom side of the mounting platform and the encapsulation separating the terminal from contact with the mounting platform; wherein the first metal is different from the second metal.

6. The method as claimed in claim 5 further comprising connecting a chip interconnect between the integrated circuit die and the terminal.

7. The method as claimed in claim 5 wherein forming the terminal includes forming the terminal partially in the encapsulation with only a portion of the terminal at a terminal bottom side exposed from the encapsulation.

8. The method as claimed in claim 5 wherein forming the encapsulation cavity includes forming a cavity sidewall extending to the terminal protrusion.

Assignments (2)
RELEASE OF SECURITY INTEREST Recorded Jun 18, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052972/0001 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →