IP Library Granted Patent US 8,847,191
Granted Patent B1
US 8,847,191 · App. 13/431,951 · Granted Sep 30, 2014

Programmable impedance memory elements, methods of manufacture, and memory devices containing the same

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Quick Facts
Patent No.
US 8,847,191
App. No.
13/431,951
Granted
Sep 30, 2014
Kind
B1
Abstract

A memory device can include a plurality of memory elements, each including first electrode having a surrounding first electrode side surface in a lateral direction; a memory material surrounding the first electrode side surface in the lateral direction, the memory material being programmable between at least two different impedance states in response to electric fields; and a second electrode formed around the memory material in the lateral direction.

Claims (46)

1. A memory device, comprising:

a plurality of memory elements, each including

first electrode enclosed by a side surface in a lateral direction;

a memory material surrounding the first electrode side surface in the lateral direction, the memory material being programmable between at least two different impedance states in response to electric fields; and

a second electrode formed around the memory material in the lateral direction; wherein

the memory elements are organized into groups of multiple memory elements, each group including a center element, and a plurality of surrounding elements, each surrounding element being positioned at a different radial position around the center element, and the number of surrounding elements is no less than three, and

the second electrode of each memory element in a group is a contiguous structure formed around the memory material of all memory elements in the group.

2. The memory device of claim 1 , wherein:

the memory material comprises at least one ion conducting material; and

the first electrode is an anode comprising at least one element that ion conducts in the ion conducting material.

3. The memory device of claim 2 , wherein:

the second electrode completely surrounds the memory material in the lateral direction; wherein

the first and second electrodes are configured to apply a substantially uniform field over all of the memory material in an erase operation to collect substantially all of the ion conducting element material back into the anode.

4. The memory device of claim 2 , wherein:

the ion conducting material is selected from the group of: a chalcogenide and an oxide.

5. The memory device of claim 2 , wherein:

the anode element that ion conducts in the ion conducting material is selected from the group of: silver and copper.

6. The memory device of claim 1 , wherein:

the first electrode has the shape of a cylinder.

7. The memory device of claim 6 , wherein:

the memory material has an annular shape.

8. The memory device of claim 1 , wherein:

the number of surrounding elements is no less than four.

9. A method, comprising:

forming a first opening that surrounds, and is separated from, a first electrode by a sacrificial material;

forming a second electrode material in the first opening;

removing the sacrificial material between the first and second electrodes to create second openings; and

forming a memory material in the second openings that is programmable between at least two different impedance states in response to electric fields.

10. The method of claim 9 , wherein:

the memory material comprises at least one ion conducting material; and

the first electrode is an anode comprising at least one element that ion conducts in the ion conducting material.

11. The method of claim 10 , wherein:

the ion conducting material is selected from the group of: a chalcogenide and an oxide.

12. The method of claim 10 , wherein:

the anode element that ion conducts in the ion conducting material is selected from the group of: silver and copper.

13. The method of claim 9 , further including:

before forming the opening

forming an electrode opening in a sacrificial material layer, and

forming a first electrode material in the electrode opening to form the first electrode.

14. The method of claim 13 , further including:

the first electrode material comprises a material having crystal grains; and

annealing to increase the size of the crystal grains.

15. The method of claim 9 , further including:

before forming the opening

forming an element opening in an insulating layer; and

forming the sacrificial material in the element opening.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Sep 24, 2019
From: OBSIDIAN AGENCY SERVICES, INC., AS COLLATERAL AGENT
To: ADESTO TECHNOLOGIES CORPORATION; ARTEMIS ACQUISITION LLC
Reel/Frame 050480/0836 →
RELEASE OF SECURITY INTEREST Recorded May 9, 2019
From: OPUS BANK
To: ADESTO TECHNOLOGIES CORPORATION; ARTEMIS ACQUISITION LLC
Reel/Frame 049125/0970 →
SECURITY INTEREST Recorded May 8, 2018
From: ADESTO TECHNOLOGIES CORPORATION; ARTEMIS ACQUISITION LLC
To: OBSIDIAN AGENCY SERVICES, INC., AS COLLATERAL AGENT
Reel/Frame 046105/0731 →
SECURITY INTEREST Recorded May 22, 2015
From: ADESTO TECHNOLOGIES CORPORATION; ARTEMIS ACQUISITION LLC
To: OPUS BANK
Reel/Frame 035754/0580 →
RELEASE OF SECURITY INTEREST Recorded Oct 15, 2013
From: OPUS BANK
To: ADESTO TECHNOLOGIES CORPORATION; ARTEMIS ACQUISITION LLC
Reel/Frame 031414/0232 →
SECURITY AGREEMENT Recorded Oct 8, 2012
From: ADESTO TECHNOLOGIES CORPORATION; ARTEMIS ACQUISITION LLC
To: OPUS BANK
Reel/Frame 029090/0922 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 10, 2012
From: GALLO, ANTONIO R.; KOUSHAN, FOROOZAN SARAH
To: ADESTO TECHNOLOGIES CORPORATION
Reel/Frame 028520/0518 →