Backside warpage control structure and fabrication method
View Patent ↗Through vias extend through a substrate between a frontside surface and a backside surface, the through vias comprising active surface ends at the frontside surface. A frontside redistribution structure is coupled to the active surface ends, the frontside redistribution structure exerting force on the frontside surface, e.g., due to a difference in the thermal coefficient of expansion (TCE) between the frontside redistribution structure and the substrate. To prevent warpage of the substrate, a backside warpage control structure is coupled to the backside surface of the substrate. The backside warpage control structure exerts an equal but opposite force to the force exerted by the frontside redistribution structure thus avoiding warpage of the substrate.
1. A structure comprising:
a substrate comprising:
a frontside surface;
a backside surface;
a through via extending through the substrate between the frontside surface and the backside surface, the through via comprising an active surface end at the frontside surface;
a frontside redistribution structure coupled to the active surface end, the frontside redistribution structure exerting force on the frontside surface;
a backside passivation layer coupled to the backside surface;
a seed layer coupled to the backside passivation layer;
a backside terminal layer plated directly on the seed layer; and
a backside warpage control structure consisting of an electrically conductive layer plated on the seed layer, the backside warpage control structure exerting an opposing force to counter the force exerted by the frontside redistribution structure
where a thickness of the plated backside terminal layer is different from a thickness of the plated electrically conductive layer.
2. The structure of claim 1 wherein the backside warpage control structure exerts the force on the backside surface.
3. The structure of claim 1 wherein the substrate is an interposer having an absence of active circuitry.
4. The structure of claim 1 wherein the substrate comprises an electronic component having active circuitry, the electronic component comprising a bond pad coupled to and positioned at the frontside surface, the frontside redistribution structure being coupled to the bond pad.
5. The structure of claim 1 wherein the frontside redistribution structure redistributes the active surface end to a frontside terminal of the frontside redistribution structure.
6. The structure of claim 1 wherein:
the backside terminal layer is plated on a terminal portion of the seed layer; and
the terminal portion of the seed layer is planar.
7. The structure of claim 1 , wherein the entire seed layer is planar.
8. The structure of claim 1 wherein the opposing force exerted by the backside warpage control structure is equal and opposite to the force exerted by the frontside redistribution structure.
9. The structure of claim 1 wherein the plated backside terminal layer has a thickness less than a thickness of the plated electrically conductive layer of the backside warpage control structure.
10. The structure of claim 1 wherein the plated backside terminal layer has a thickness greater than a thickness of the plated electrically conductive layer of the backside warpage control structure.
11. The structure of claim 1 , wherein the plated backside terminal layer is plated of a same material, plated at a same thickness, and plated in a same process step as the plated electrically conductive layer of the backside warpage control structure.
12. The structure of claim 1 wherein the plated backside terminal layer is formed of a material different from a material of the plated electrically conductive layer of the backside warpage control structure.
13. A structure comprising:
a substrate;
a frontside redistribution structure coupled to a frontside surface of the substrate;
a backside terminal coupled to a backside surface of the substrate;
a patterned mask coupled to the backside surface, the patterned mask covering and protecting the backside terminal, the patterned mask comprising a warpage control artifact comprising an opening through the patterned mask in which at least a portion of a backside warpage control structure is formed; and
the backside warpage control structure consisting of an electrically conductive material formed in the opening of the warpage control artifact.
14. The structure of claim 13 wherein the backside terminal has a thickness less than a thickness of the backside warpage control structure.
15. The structure of claim 13 wherein the backside terminal has a thickness greater than a thickness of the backside warpage control structure.
16. The structure of claim 13 wherein the backside terminal is formed of a material different than a material of the backside warpage control structure.
17. A method of forming a semiconductor device, the method comprising:
forming a substrate;
forming a frontside redistribution structure coupled to a frontside surface of the substrate;
forming a backside terminal coupled to a backside surface of the substrate;
forming a patterned mask coupled to the backside surface, the patterned mask covering and protecting the backside terminal, the patterned mask comprising a warpage control artifact comprising an opening through the patterned mask in which at least a portion of a backside warpage control structure is formed; and
forming the backside warpage control structure comprising an electrically conductive material in the opening of the warpage control artifact.
18. The method of claim 17 , wherein the backside terminal has a thickness less than a thickness of the backside warpage control structure.
19. The method of claim 17 , wherein the backside terminal has a thickness greater than a thickness of the backside warpage control structure.
20. The method of claim 17 , wherein the backside terminal is formed of a material different than a material of the backside warpage control structure.