IP Library Granted Patent US 8,648,475
Granted Patent B2
US 8,648,475 · App. 13/434,473 · Granted Feb 11, 2014

Low noise flip-chip packages and flip chips thereof

Inventors: Ian Juso Dedic (Northolt Middlesex, GB); Ghazanfer Ali (Reading Berkshire, GB)
Assignee: Fujitsu Semiconductor Limited
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Quick Facts
Patent No.
US 8,648,475
App. No.
13/434,473
Granted
Feb 11, 2014
Kind
B2
Abstract

A flip chip comprises first and second circuitry portions formed in a substrate. The first and second circuitry portions are spaced apart from one another in a separation direction. A substrate-contact boundary is formed in the substrate between the first and second circuitry portions.

Claims (28)

1. A flip chip, comprising:

a substrate having a thickness T; and

first and second circuitry portions formed in the substrate,

wherein;

the first and second circuitry portions are spaced apart from one another in a separation direction;

a substrate-contact boundary is formed in the substrate between the first and second circuitry portions; and

the substrate-contact boundary comprises a substrate contact having a width W in the separation direction large enough compared to the thickness T such that in use the substrate-contact boundary provides substantial noise isolation between the first and second circuitry portions.

2. The flip chip as claimed in claim 1 , wherein W≧T, and preferably wherein W≧2T, and more preferably wherein W≧4T.

3. The flip-chip as claimed in claim 1 or 2 , wherein:

the substrate contact is a first substrate contact;

the width W is a width W 1 ;

the substrate-contact boundary comprises a second substrate contact formed in the substrate between the first and second circuitry portions;

the second substrate contact has a width W 2 in the separation direction; and

a combination C of the widths W 1 and W 2 is large enough compared to the thickness T such that in use the substrate-contact boundary provides substantial noise isolation between the first and second circuitry portions.

4. The flip chip as claimed in claim 3 , wherein C≧T, and preferably wherein C≧2T, and more preferably wherein C≧4T.

5. The flip chip as claimed in claim 3 , wherein the first and second substrate contacts are spaced apart from one another in the separation direction.

6. The flip chip as claimed in claim 5 , wherein the first and second substrate contacts are spaced apart from one another in the separation direction by a separation width SW which is substantially small as compared to a sum of widths W 1 and W 2 .

7. The flip chip as claimed in claim 3 , wherein the width W 1 is substantially the same as the width W 2 .

8. The flip chip as claimed in claim 3 , wherein each of the first and second substrate contacts is generally elongate so as to form a wall between the first and second circuitry portions.

9. The flip chip as claimed in claim 1 or 2 , wherein the substrate contact is generally elongate so as to form a wall between said circuitry portions.

10. A flip chip, comprising:

a substrate having a thickness T; and

first and second circuitry portions formed in the substrate,

wherein:

the first and second circuitry portions are spaced apart from one another in a separation direction;

a substrate-contact boundary is formed in the substrate between the first and second circuitry portions; and

the substrate-contact boundary comprises a substrate contact having a width W in the separation direction, and the substrate contact is generally elongate so as to form a wall between the first and second circuitry portions, wherein W>2T.

11. The flip chip as claimed in claim 10 , wherein W≧4T.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035508/0637 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EXTRA COMMA IN THE ASSIGNEE'S ADDRESS PREVIOUSLY RECORDED ON REEL 031465 FRAME 0904. ASSIGNOR(S) HEREBY CONFIRMS THE ADDRESS HAS NO EXTRA COMMAS. Recorded Nov 27, 2013
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 031731/0712 →
CHANGE OF NAME Recorded Oct 22, 2013
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 031465/0904 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 18, 2013
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 031433/0882 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 15, 2013
From: DEDIC, IAN JUSO; ALI, GHAZANFER
To: FUJITSU LIMITED
Reel/Frame 031405/0776 →
Priority Claims (1)
EP 07113378 · Jul 27, 2007 · regional
Continuity (2)
Division 12180212 · Jul 25, 2008
Related Publication 20120187579A1 · Jul 26, 2012