IP Library Granted Patent US 9,086,906
Granted Patent B2
US 9,086,906 · App. 13/436,654 · Granted Jul 21, 2015

Apparatus and method for guest and root register sharing in a virtual machine

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Quick Facts
Patent No.
US 9,086,906
App. No.
13/436,654
Granted
Jul 21, 2015
Kind
B2
Abstract

A computer readable storage medium includes executable instructions to define a processor with guest mode control registers supporting guest mode operating behavior defined by guest context specified in the guest mode control registers. The guest mode control registers include a control bit to specify a guest access blocked register state and a shared register state. Root mode control registers support root mode operating behavior defined by root context specified in the root mode control registers. The root mode control registers include control bits to enable replicated register state access and shared register state access. The guest context and the root context support virtualization of hardware resources such that multiple operating systems supporting multiple applications are executed by the hardware resources.

Claims (21)

1. A non-transitory computer readable storage medium, comprising executable instructions to define a processor with:

guest mode control registers supporting guest mode operating behavior defined by guest context specified in the guest mode control registers, wherein the guest mode control registers include a control bit to specify a guest access blocked register state and a shared register state; and

root mode control registers supporting root mode operating behavior defined by root context specified in the root mode control registers, wherein the root mode control registers include control bits to enable replicated register state access and shared register state access;

wherein the guest context and the root context support virtualization of hardware resources such that multiple operating systems supporting multiple applications are executed by the hardware resources.

2. The non-transitory computer readable storage medium of claim 1 wherein the replicated register state access is controlled by the root context.

3. The non-transitory computer readable storage medium of claim 1 wherein the shared register state access allows guest mode access to shared register state without root mode intervention.

4. The non-transitory computer readable storage medium of claim 3 wherein the shared register state is to privileged machine state.

5. The non-transitory computer readable storage medium of claim 3 wherein the shared register state characterizes an operation accessible by the guest mode operating behavior and the root mode operating behavior.

6. The non-transitory computer readable storage medium of claim 5 wherein guest mode operating behavior includes register read and write permissions and the root mode operating behavior includes register read and write permissions.

7. The non-transitory computer readable storage medium of claim 5 wherein the operation is a debug watch operation.

8. The non-transitory computer readable storage medium of claim 5 wherein the operation is selected from performance counting, interrupt handling and cache state monitoring.

9. A non-transitory computer readable storage medium, comprising executable instructions to define a processor with:

root mode control registers storing root context defining privileged machine state, wherein the root mode control registers include control bits to enable access to replicated privileged machine state and shared access to the privileged machine state; and

guest mode control registers storing guest context defining guest execution permissions, wherein the guest mode control registers include a control bit to specify a guest access blocked register state and a guest shared register state enabling access to either the replicated privileged machine state or the privileged machine state;

wherein the guest context and the root context support virtualization of hardware resources such that multiple operating systems supporting multiple applications are executed by the hardware resources.

10. The non-transitory computer readable storage medium of claim 9 wherein the replicated privileged machine state access is controlled by the root context.

11. The non-transitory computer readable storage medium of claim 9 wherein the privileged machine state access is controlled by the guest context.

12. The non-transitory computer readable storage medium of claim 9 wherein the root context characterizes an operation accessible by the guest context.

13. The non-transitory computer readable storage medium of claim 12 wherein guest context includes register read and write permissions and the root context includes register read and write permissions.

14. The non-transitory computer readable storage medium of claim 12 wherein the operation is a debug watch operation.

15. The non-transitory computer readable storage medium of claim 12 wherein the operation is selected from performance counting, interrupt handling and cache state monitoring.

Assignments (9)
RELEASE OF SECURITY INTEREST Recorded Dec 29, 2022
From: CAPITAL FINANCE ADMINISTRATION, LLC, AS ADMINISTRATIVE AGENT
To: MIPS TECH, LLC; WAVE COMPUTING INC.
Reel/Frame 062251/0251 →
SECURITY INTEREST Recorded Jun 14, 2021
From: MIPS TECH, LLC; WAVE COMPUTING, INC.
To: CAPITAL FINANCE ADMINISTRATION, LLC
Reel/Frame 056558/0903 →
RELEASE OF SECURITY INTEREST Recorded Jun 14, 2021
From: WAVE COMPUTING LIQUIDATING TRUST
To: MIPS TECH, INC.; HELLOSOFT, INC.; WAVE COMPUTING (UK) LIMITED; IMAGINATION TECHNOLOGIES, INC.; CAUSTIC GRAPHICS, INC.; MIPS TECH, LLC; WAVE COMPUTING, INC.
Reel/Frame 056589/0606 →
SECURITY INTEREST Recorded Feb 26, 2021
From: WAVE COMPUTING, INC.; MIPS TECH, LLC; MIPS TECH, INC.; HELLOSOFT, INC.; WAVE COMPUTING (UK) LIMITED; IMAGINATION TECHNOLOGIES, INC.; CAUSTIC GRAPHICS, INC.
To: WAVE COMPUTING LIQUIDATING TRUST
Reel/Frame 055429/0532 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 8, 2018
From: IMAGINATION TECHNOLOGIES LIMITED
To: HELLOSOFT LIMITED
Reel/Frame 046588/0985 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 8, 2018
From: HELLOSOFT LIMITED
To: MIPS TECH LIMITED
Reel/Frame 046589/0282 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 8, 2018
From: MIPS TECH LIMITED
To: MIPS TECH, LLC
Reel/Frame 046589/0726 →
CHANGE OF NAME Recorded Apr 20, 2017
From: MIPS TECHNOLOGIES, INC.
To: IMAGINATION TECHNOLOGIES, LLC
Reel/Frame 042301/0084 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2012
From: PATTEL, SANJAY; ROZARIO, RANJIT JOSEPH
To: MIPS TECHNOLOGIES, INC.
Reel/Frame 027967/0655 →